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AS8530-ASOT 数据表(PDF) 17 Page - ams AG

部件名 AS8530-ASOT
功能描述  LIN Transceiver with Integrated Voltage Regulator and MCU Interface for Automotive Applications
PDF  29 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS8530-ASOT 数据表(HTML) 17 Page - ams AG

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www.austriamicrosystems.com/Lin_CompanionIC/AS8530
Revision 0.01
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AS8530
Preliminary Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
8 Application Information
8.1 Initialization
When the power supply is switched on, if VSUP > VSUVR_OFF, RESET_VSUP_N becomes inactive (high). After this, the voltage regulator
starts with a default LDO output setting of 3.3V and Vuvr_off setting of 2.75V. If VCC > Vuvr_off (2.75V), active-low PORN_2_OTP is generated.
The rising edge of PORN_2_OTP loads contents of fuse onto the OTP latch after load access time TLoad. LOAD_OTP_IN_PREREG signal loads
contents of OTP latch onto the pre-regulator domain register. This register gives actual settings of LDO, Vuvr_off and Reset Timeout period TRes.
This is done because the OTP block is powered by the VCC. If VCC > Vuvr_off (phase 2), Reset timeout is restarted. RESET signal is de-
asserted after Reset Timeout period TRes (phase 2) and then device enters into normal mode. The circuit also needs to initialize correctly for very
slow ramp rates on VSUP (of the order of 0.5V/min).
Figure 7. Initialization Sequence for AS8530
Table 13. VSUP>Vsuvr_on and
VCC<Vuvr_on
Block
Output Signal
TRANSCEIVER = Enabled (disabled only during initial VSUP ramp-up)
LIN = high-z, RX = follows V
LDO = Enabled (disabled only during initial ramp-up)
VCC = low
RELAY DRIVER = Enabled
LDRIVE1 = high, LDRIVE2 = high
RESET = Enabled
RESET = high-z
RESISTIVE DIVIDER = Enabled
VBAT= high, VBAT_DIV = enabled
Table 14. VSUP<Vsuvr_on
Block
Output Signal
TRANSCEIVER = Disabled
LIN = high-z, RX = high-z
LDO = Disabled
VCC = low
RELAY DRIVER = Disabled
LDRIVE1 = high, LDRIVE2 = high
LDO Off
LDO On
VCC Por Threshold = 2.75V
LDO setting = 3.3V
Reset Timeout = 4msec
LDO On
VCC Por Threshold = from OTP Block
LDO setting = from OTP Block
Reset Timeout = from OTP Block
VCC
VSUP
Device
Settings
RESET_VCC_N
RESET_VSUP_N
PORN_2_OTP
LOAD_OTP_IN_P
REREG
RESET
VCC_POR_Threshold = 2.75V
VSUP_POR_Threshold = 3.1V
6 Cycles of
RC-Oscillator
PHASE 1
PHASE 2
If Phase 1 POR threshold == Phase 2 POR threshold
Tres = Reset Timeout from OTP Block
If Phase 1 POR threshold != Phase 2 POR threshold
Tres = Reset Timeout from OTP Block



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