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AM1806 数据表(PDF) 49 Page - Texas Instruments

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部件名 AM1806
功能描述  AM1806 ARM Microprocessor
PDF  241 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM1806 数据表(HTML) 49 Page - Texas Instruments

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AM1806
www.ti.com
SPRS658B – FEBRUARY 2010 – REVISED MAY 2010
3.7.23 General Purpose Input Output
Table 3-25. General Purpose Input Output Terminal Functions
SIGNAL
POWER
TYPE(1)
PULL(2)
DESCRIPTION
GROUP(3)
NAME
NO.
GP0
ACLKR / PRU0_R30[20] / GP0[15] / PRU0_R31[22]
A1
I/O
CP[0]
A
ACLKX / PRU0_R30[19] / GP0[14] / PRU0_R31[21]
B1
I/O
CP[0]
A
AFSR / GP0[13] / PRU0_R31[20]
C2
I/O
CP[0]
A
AFSX / GP0[12] /PRU0_R31[19]
B2
I/O
CP[0]
A
AHCLKR / PRU0_R30[18] / UART1_RTS / GP0[11] /
A2
I/O
CP[0]
A
PRU0_R31[18]
AHCLKX / USB_REFCLKIN / UART1_CTS / GP0[10] /
A3
I/O
CP[0]
A
PRU0_R31[17]
AMUTE / PRU0_R30[16] / UART2_RTS / GP0[9] / PRU0_R31[16]
D5
I/O
CP[0]
A
GPIO Bank 0
RTC_ALARM / UART2_CTS / GP0[8] / DEEPSLEEP
F4
I/O
CP[0]
A
AXR15 / EPWM0TZ[0] / ECAP2_APWM2 / GP0[7]
A4
I/O
CP[1]
A
AXR14 / CLKR1 / GP0[6]
B4
I/O
CP[2]
A
AXR13 / CLKX1 / GP0[5]
B3
I/O
CP[2]
A
AXR12 / FSR1 / GP0[4]
C4
I/O
CP[2]
A
AXR11 / FSX1 / GP0[3]
C5
I/O
CP[2]
A
AXR10 / DR1 / GP0[2]
D4
I/O
CP[2]
A
AXR9 / DX1 / GP0[1]
C3
I/O
CP[2]
A
AXR8 / CLKS1 / ECAP1_APWM1 / GP0[0] / PRU0_R31[8]
E4
I/O
CP[3]
A
GP1
AXR7 / EPWM1TZ[0] / PRU0_R30[17] / GP1[15] / PRU0_R31[7]
D2
I/O
CP[4]
A
AXR6 / CLKR0 / GP1[14] / PRU0_R31[6]
C1
I/O
CP[5]
A
AXR5 / CLKX0 / GP1[13]
D3
I/O
CP[5]
A
AXR4 / FSR0 / GP1[12]
D1
I/O
CP[5]
A
AXR3 / FSX0 / GP1[11]
E3
I/O
CP[5]
A
AXR2 / DR0 / GP1[10]
E2
I/O
CP[5]
A
AXR1 / DX0 / GP1[9]
E1
I/O
CP[5]
A
SPI0_CLK / EPWM0A / GP1[8]
D19
I/O
CP[7]
A
GPIO Bank 1
SPI0_SCS[1] / TM64P0_OUT12 / GP1[7] / TM64P0_IN12
E16
I/O
CP[10]
A
SPI0_SCS[0] / TM64P1_OUT12 / GP1[6] / TM64P1_IN12
D17
I/O
CP[10]
A
SPI1_SCS[7] / I2C0_SCL / TM64P2_OUT12 / GP1[5]
G16
I/O
CP[11]
A
SPI1_SCS[6] / I2C0_SDA / TM64P3_OUT12 / GP1[4]
G18
I/O
CP[11]
A
SPI1_SCS[5] / UART2_RXD / I2C1_SCL / GP1[3]
F17
I/O
CP[12]
A
SPI1_SCS[4] / UART2_TXD / I2C1_SDA / GP1[2]
F16
I/O
CP[12]
A
SPI1_SCS[3] / UART1_RXD / GP1[1]
E18
I/O
CP[13]
A
SPI1_SCS[2] / UART1_TXD / GP1[0]
F19
I/O
CP[13]
A
(1)
I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2)
IPD = Internal Pulldown resistor; IPU = Internal Pullup resistor; CP[n] = configurable pull-up/pull-down (where n is the pin group) using
the PUPDENA and PUPDSEL registers in the System Module. The pull-up and pull-down control of these pins is not active until the
device is out of reset. During reset, all of the pins associated with these registers are weakly pulled down. If the application requires a
pull-up, an external pull-up can be used.
(3)
This signal is part of a dual-voltage IO group (A, B or C). These groups can be operated at 3.3V or 1.8V nominal. The three groups can
be operated at independent voltages but all pins withina group will operate at the same voltage. Group A operates at the voltage of
power supply DVDD3318_A. Group B operates at the voltage of power supply DVDD3318_B. Group C operates at the voltage of power
supply DVDD3318_C.
Copyright © 2010, Texas Instruments Incorporated
Device Overview
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