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SPBT2532C2AT 数据表(PDF) 15 Page - STMicroelectronics |
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SPBT2532C2AT 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 48 page ![]() SPBT2532C2.AT Software architecture Doc ID 16089 Rev 3 15/48 7.1 Lower layer stack ● Full Bluetooth v2.1 data rate (3M bps maximum) ● Device power modes—active, sleep and deep sleep ● Wake on Bluetooth feature—optimized power consumption of host CPU ● Authentication and encryption ● Encryption key length from 8-bits to 128-bits maximum ● Persistent Flash memory—for BD Address and radio parameter storage ● ACL (Asynchronous Connection Less) packet types (DM1, DH1, DM3, DH3, DM5, DH5, 2-DH1, 2-DH3, 2-DH5) ● Point to point support ● Park, sniff, and hold modes—fully supported to maximum allowed intervals (see Appendix B: ) ● Master slave switch—supported during connection and post connection ● Dedicated inquiry access code—for improved inquiry scan performance ● Dynamic packet selection—channel quality driven data rate to optimize link performance ● Dynamic power control—interference reduction and link performance ● Bluetooth test modes—per Bluetooth v2.0 specification ● 802.11b/g co-existence—AWMA and AFH ● Vendor specific HCI commands—to support device configuration and certification test modes 7.2 Upper layer stack: amp’ed UP ● SPP, SDAP, GAP protocols ● RFComm, SDP, and L2CAP supported 7.3 AT command set: abSerial ● Please see Appendix B: abSerial reference guide for details |
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