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数据搜索系统，热门电子元器件搜索 |
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PIC12F1822-I/MF 数据表(PDF) 20 Page - Microchip Technology |
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PIC12F1822-I/MF 数据表(HTML) 20 Page - Microchip Technology |
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20 / 398 page  PIC12F/LF1822/16F/LF1823 DS41413A-page 20 Preliminary 2010 Microchip Technology Inc. FIGURE 2-1: CORE BLOCK DIAGRAM Data Bus 8 14 Program Bus Instruction reg Program Counter 8 Level Stack (13-bit) Direct Addr 7 12 Addr MUX FSR reg STATUS reg MUX ALU Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Instruction Decode & Control Timing Generation OSC1/CLKIN OSC2/CLKOUT VDD 8 8 Brown-out Reset 12 3 VSS Internal Oscillator Block Configuration Data Bus 8 14 Program Bus Instruction reg Program Counter 8 Level Stack (13-bit) Direct Addr 7 Addr MUX FSR reg STATUS reg MUX ALU W Reg Instruction Decode & Control Timing Generation VDD 8 8 3 VSS Internal Oscillator Block Configuration 15 Data Bus 8 14 Program Bus Instruction Reg Program Counter 16-Level Stack (15-bit) Direct Addr 7 RAM Addr Addr MUX Indirect Addr FSR0 Reg STATUS Reg MUX ALU Instruction Decode and Control Timing Generation VDD 8 8 3 VSS Internal Oscillator Block Configuration Flash Program Memory RAM FSR reg FSR reg FSR1 Reg 15 15 15 Program Memory Read (PMR) 12 FSR reg FSR reg BSR Reg 5 |
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