PIC12F1822-ISLASHMF datasheet(48/398 Pages) MICROCHIP

48 / 398 page

PIC12F/LF1822/16F/LF1823

DS41413A-page 48

Preliminary

 2010 Microchip Technology Inc.

3.5.2

LINEAR DATA MEMORY

The linear data memory is the region from FSR

address 0x2000 to FSR address 0x29AF. This region is

a virtual region that points back to the 80-byte blocks of

GPR memory in all the banks.

Unimplemented memory reads as 0x00. Use of the

linear data memory region allows buffers to be larger

than 80 bytes because incrementing the FSR beyond

one bank will go directly to the GPR memory of the next

bank.

The 16 bytes of common memory are not included in

the linear data memory region.

FIGURE 3-10:

LINEAR DATA MEMORY

MAP

3.5.3

PROGRAM FLASH MEMORY

To make constant data access easier, the entire

program Flash memory is mapped to the upper half of

the FSR address space. When the MSB of FSRnH is

set, the lower 15 bits are the address in program

memory which will be accessed through INDF. Only the

lower 8 bits of each memory location is accessible via

INDF. Writing to the program Flash memory cannot be

accomplished via the FSR/INDF interface. All

instructions that access program Flash memory via the

FSR/INDF interface will require one additional

instruction cycle to complete.

FIGURE 3-11:

PROGRAM FLASH

MEMORY MAP

Location Select

0x2000

FSRnH

FSRnL

0x020

Bank 0

0x06F

0x0A0

Bank 1

0x0EF

0x120

Bank 2

0x16F

0xF20

Bank 30

0xF6F

0x29AF

Location Select

0x8000

FSRnH

FSRnL

0x0000

0x7FFF

0xFFFF

Program

Flash

Memory

(low 8

bits)

PIC12F1822-I/MF 数据表(PDF) 48 Page - Microchip Technology

PIC12F1822-I/MF 数据表(HTML) 48 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载