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PIC12F1822-I/MF 数据表(PDF) 280 Page - Microchip Technology |
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PIC12F1822-I/MF 数据表(HTML) 280 Page - Microchip Technology |
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280 / 398 page  PIC12F/LF1822/16F/LF1823 DS41413A-page 280 Preliminary 2010 Microchip Technology Inc. FIGURE 25-2: EUSART RECEIVE BLOCK DIAGRAM The operation of the EUSART module is controlled through three registers: • Transmit Status and Control (TXSTA) • Receive Status and Control (RCSTA) • Baud Rate Control (BAUDCON) These registers are detailed in Register 25-1, Register 25-2 and Register 25-3, respectively. When the receiver or transmitter section is not enabled then the corresponding RX or TX pin may be used for general purpose input and output. RX/DT pin Pin Buffer and Control SPEN Data Recovery CREN OERR FERR RSR Register MSb LSb RX9D RCREG Register FIFO Interrupt RCIF RCIE Data Bus 8 Stop START (8) 7 1 0 RX9 • • • SPBRGL SPBRGH BRG16 RCIDL FOSC ÷ n n + 1 Multiplier x4 x16 x64 SYNC 1X00 0 BRGH X110 0 BRG16 X101 0 Baud Rate Generator |
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