SA9101 datasheet(8/40 Pages) SAMES

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SA9101

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System Internal Highway

Signal

Input/Output/Bidirect

Function

DRO

Data Receive Out

DXI

Data Transmit In

Timeslot channels 0 - 31 to/from PCM30 interface.

Bit rate 2048 kbit/s or 4096 kbit/s selectable via microprocessor interface.

CAS Processing

Signal

Input/Output/Bidirect

Function

DRO

Data Receive Out

DXI

Data Transmit In

RCAS

Receive CAS, active high marks

reception of channel 16

TCAS

Transmit CAS, active high marks

transmission of channel 16

Test/Supervision

Signal

I nput/Output/Bidirect

Function

CHPAR

Receive Channel parity

Appears according to the related

channel (timeslot)

DFPAR

Doubleframe Parity

During a current double-frame, the

parity of the previous double-frame

appears on DFPAR

XTOP

40,

HDB3-coded PCM (+), PCM (-) signal

XTOM

for HDB3 diagnostic loop

RESQ

Reset (Output Disable)

Asynchronous reset signal (active low),

resets the internal circuit and switches

all outputs to high impedance state -

must be held low for minimum of 2µs

XCHPAR

Transmit channel parity

SA9101 数据表(PDF) 8 Page - Sames

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