TDF8591TH_1

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 01 — 5 March 2008

4 of 34

NXP Semiconductors

TDF8591TH

2

× 100 W SE (4 Ω) or 1 × 310 W BTL (4 Ω) class-D amplifier

The TDF8591TH contains two independent amplifier channels with a differential input

stage, high output power, high efficiency (90 %), low distortion and a low quiescent

current. The amplifier channels can be connected in the following configurations:

The TDF8591TH also contains circuits common to both channels such as the oscillator, all

reference sources, the mode functionality and a digital timing manager. For protection a

thermal foldback, temperature, current and voltage protection are built in.

6.2 Mode selection

The TDF8591TH can be switched in three operating modes via pin MODE:

the output is suppressed by disabling the VI-converter input stages

The input stage (see Figure 1) contributes to the DC offset measured at the amplifier

output. To avoid pop noise the DC output offset voltage should be increased gradually at a

constant for a gradually increase of the DC output offset voltage between mute and

operating is generated via an RC network on pin MODE. An example of a switching circuit

for driving pin MODE is illustrated in Figure 3 and explained in Table 3.

Fig 3.

Example of mode selection circuit

Table 3.

Mode selection

S1

S2

Mode selection

closed

closed

Standby mode

closed

open

Standby mode

open

closed

Mute mode

open

open

Operating mode

001aad836

5.6 k

Ω

5.6 k

Ω

5.6 V

5.6 k

Ω

S1

S2

MODE

SGND

100

µF

(10 V)