ST10F276Z5 datasheet(56/239 Pages) STMICROELECTRONICS

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Bootstrap loader

ST10F276Z5

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5.3.3

ST10 Configuration in UART BSL (RS232 or K-Line)

When the ST10F276Z5 enters BSL mode on UART, the configuration shown in Table 31 is

automatically set (values that deviate from the normal reset values are marked in bold).

Other than after a normal reset, the watchdog timer is disabled, so the bootstrap loading

sequence is not time limited. Pin TxD0 is configured as output, so the ST10F276Z5 can

return the acknowledge byte. Even if the internal IFLASH is enabled, a code cannot be

executed from it.

5.3.4

Loading the start-up code

After sending the acknowledge byte, the BSL enters a loop to receive 32 bytes via ASC0.

These bytes are stored sequentially into locations 00’FA40H through 00’FA5FH of the IRAM,

allowing up to 16 instructions to be placed into the RAM area. To execute the loaded code

the BSL then jumps to location 00’FA40H, that is, the first loaded instruction. The bootstrap

loading sequence is now terminated; however, the device remains in BSL mode. The initially

loaded routine will most probably load additional code or data, as an average application is

likely to require substantially more than 16 instructions. This second receive loop may

directly use the pre-initialized interface ASC0 to receive data and store it in arbitrary user-

defined locations.

This second level of loaded code may be

●

the final application code

●

another, more sophisticated, loader routine that adds a transmission protocol to

enhance the integrity of the loaded code or data

●

a code sequence to change the system configuration and enable the bus interface to

store the received data into external memory

Table 31.

ST10 configuration in UART BSL mode (RS232 or K-line)

Function or register

Access

Notes

Watchdog timer

Disabled

0400H

(1)

In Bootstrap modes (standard or alternate) ROMEN, bit 10 of SYSCON, is always set regardless of EA pin

level. BYTDIS, bit 9 of SYSCON, is set according to data bus width selection via Port0 configuration.

Context Pointer CP

FA00H

Stack Pointer SP

FA40H

FC00H

access to startup

configuration(2)

BUSCON0 is initialized with 0000h, external bus disabled, if pin EA is high during reset. If pin EA is low

during reset, BUSACT0, bit 10, and ALECTL0, bit 9, are set enabling the external bus with lengthened ALE

signal. BTYP field, bit 7 and 6, is set according to Port0 configuration.

8011H

Initialized only if Bootstrap via UART

access to ‘00’ byte

Initialized only if Bootstrap via UART

P3.10 / TXD0

‘1’

Initialized only if Bootstrap via UART

DP3.10

‘1’

Initialized only if Bootstrap via UART

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