ST10F276Z5 datasheet(92/239 Pages) STMICROELECTRONICS

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Parallel ports

ST10F276Z5

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12.2

I/Os special features

12.2.1

Open drain mode

Some of the I/O ports of ST10F276Z5 support the open drain capability. This programmable

feature may be used with an external pull-up resistor, in order to get an AND wired logical

function.

This feature is implemented for ports P2, P3, P4, P6, P7 and P8 (see respective sections),

and is controlled through the respective Open Drain Control Registers ODPx.

12.2.2

Input threshold control

The standard inputs of the ST10F276Z5 determine the status of input signals according to

TTL levels. In order to accept and recognize noisy signals, CMOS input thresholds can be

selected instead of the standard TTL thresholds for all the pins. These CMOS thresholds

are defined above the TTL thresholds and feature a higher hysteresis to prevent the inputs

from toggling while the respective input signal level is near the thresholds.

The Port Input Control registers PICON and XPICON are used to select these thresholds for

each Byte of the indicated ports, this means the 8-bit ports P0L, P0H, P1L, P1H, P4, P7 and

P8 are controlled by one bit each while ports P2, P3 and P5 are controlled by two bits each.

All options for individual direction and output mode control are available for each pin,

independent of the selected input threshold.

12.3

Alternate port functions

Each port line has one associated programmable alternate input or output function.

●

PORT0 and PORT1 may be used as address and data lines when accessing external

memory. Besides, PORT1 provides also:

–

Input capture lines

–

8 additional analog input channels to the A/D converter

●

Port 2, Port 7 and Port 8 are associated with the capture inputs or compare outputs of

the CAPCOM units and/or with the outputs of the PWM0 module, of the PWM1 module

and of the ASC1.

Port 2 is also used for fast external interrupt inputs and for timer 7 input.

●

Port 3 includes the alternate functions of timers, serial interfaces, the optional bus

control signal BHE and the system clock output (CLKOUT).

●

Port 4 outputs the additional segment address bit A23...A16 in systems where more

than 64 Kbytes of memory are to be access directly. In addition, CAN1, CAN2 and I2C

lines are provided.

●

Port 5 is used as analog input channels of the A/D converter or as timer control signals.

●

Port 6 provides optional bus arbitration signals (BREQ, HLDA, HOLD) and chip select

signals and the SSC1 lines.

If the alternate output function of a pin is to be used, the direction of this pin must be

programmed for output (DPx.y=‘1’), except for some signals that are used directly after reset

and are configured automatically. Otherwise the pin remains in the high-impedance state

and is not effected by the alternate output function. The respective port latch should hold a

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