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ST10F276Z5 数据表(PDF) 152 Page - STMicroelectronics |
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ST10F276Z5 数据表(HTML) 152 Page - STMicroelectronics |
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152 / 239 page  Register set ST10F276Z5 152/239 CC10 FE94h 4Ah CAPCOM register 10 0000h CC11 FE96h 4Bh CAPCOM register 11 0000h CC12 FE98h 4Ch CAPCOM register 12 0000h CC13 FE9Ah 4Dh CAPCOM register 13 0000h CC14 FE9Ch 4Eh CAPCOM register 14 0000h CC15 FE9Eh 4Fh CAPCOM register 15 0000h ADDAT FEA0h 50h A/D converter result register 0000h WDT FEAEh 57h Watchdog timer register (read-only) 0000h S0TBUF FEB0h 58h Serial channel 0 transmit buffer register (write-only) 0000h S0RBUF FEB2h 59h Serial channel 0 receive buffer register (read-only) - - XXh S0BG FEB4h 5Ah Serial channel 0 baud rate generator reload register 0000h PECC0 FEC0h 60h PEC channel 0 control register 0000h PECC1 FEC2h 61h PEC channel 1 control register 0000h PECC2 FEC4h 62h PEC channel 2 control register 0000h PECC3 FEC6h 63h PEC channel 3 control register 0000h PECC4 FEC8h 64h PEC channel 4 control register 0000h PECC5 FECAh 65h PEC channel 5 control register 0000h PECC6 FECCh 66h PEC channel 6 control register 0000h PECC7 FECEh 67h PEC channel 7 control register 0000h P0L b FF00h 80h Port0 low register (lower half of PORT0) - - 00h P0H b FF02h 81h Port0 high register (upper half of PORT0) - - 00h P1L b FF04h 82h Port1 low register (lower half of PORT1) - - 00h P1H b FF06h 83h Port1 high register (upper half of PORT1) - - 00h IDX0 b FF08h 84h MAC unit address pointer 0 0000h IDX1 b FF0Ah 85h MAC unit address pointer 1 0000h BUSCON0 b FF0Ch 86h Bus configuration register 0 0xx0h MDC b FF0Eh 87h CPU multiply divide control register 0000h PSW b FF10h 88h CPU program status word 0000h SYSCON b FF12h 89h CPU system configuration register 0xx0h BUSCON1 b FF14h 8Ah Bus configuration register 1 0000h BUSCON2 b FF16h 8Bh Bus configuration register 2 0000h BUSCON3 b FF18h 8Ch Bus configuration register 3 0000h BUSCON4 b FF1Ah 8Dh Bus configuration register 4 0000h Table 69. Special function registers ordered by address (continued) Name Physical address 8-bit address Description Reset value |
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