STE12PS datasheet(14/44 Pages) STMICROELECTRONICS

14 / 44 page

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Functional description

STE12PS

14/44

3.3

Power ON

After the classification phase the port will be powered.

Once activated, the power-on sequencer manages the channel’s activation requests

received through the signature detection circuitry. For the incoming channel, activation

requests are stored in the power-on sequencer and then serviced, one at a time, only when

the previously activated channel leaves the current limiting condition that normally occurs

during power on due to the capacitive part of the load. (see also smart-power mode and

special issues)

A port is turned-on by ramping-up the voltage and increasing the current limit to its upper

limit. After a programmable time (Tinrush), if the port has reached full voltage and is out of

current limitation, it is marked as powered. The related port power bit and the power class

bits are set according to the class in the logic interface bit stream.

The active ports are continuously monitored in order to detect a fault condition such as

Short Circuit, Disconnection or Excess Power (overload).

3.3.1

Under load (disconnection)

Detection of a disconnection, if enabled (default condition), can be performed via a DC and/or AC

method - default is DC

⊕ AC (logical OR):

●

DC method

If this method is selected via the logic interface and if the port current drops under

7.5mA for more than 10ms, then the STE12PS will detect a DC disconnection. If this

condition persist for Tmpdo (

Table 12), then power is removed and the port is marked

as free, enabling a new detection.

●

AC method

If this method is selected via the logic interface, the STE12PS probes the channels via

coupling capacitors and detects when the AC load impedance, Zac, exceeds the

maximum, 100k

Ω limit for a time longer than 20ms. In this case, the PSE will detect an

AC disconnection. If this condition persist for a time Tmpdo (

Table 12), power is

removed and the port is marked as free, enabling a new detection.

Disconnection modes are as following: Disabled, DC method only, AC method only, both AC

and DC (combined in OR

⊕ logic or in AND ⊗ logic).

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