MPC8343CVRADDB datasheet(47/79 Pages) FREESCALE

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MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 10

Freescale Semiconductor

SPI

17.2

SPI AC Timing Specifications

Table 50 provides the SPI input and output AC timing specifications.

Figure 32 provides the AC test load for the SPI.

Figure 32. SPI AC Test Load

Input current

IIN

——

±5

μA

Output high voltage

VOH

IOH = –8.0 mA

2.4

—

Output low voltage

VOL

IOL = 8.0 mA

—

0.5

Output low voltage

VOL

IOL = 3.2 mA

—

0.4

Table 50. SPI AC Timing Specifications1

Parameter

Symbol2

Min

Max

Unit

SPI outputs valid—Master mode (internal clock) delay

tNIKHOV

—6

SPI outputs hold—Master mode (internal clock) delay

tNIKHOX

0.5

—

SPI outputs valid—Slave mode (external clock) delay

tNEKHOV

—8

SPI outputs hold—Slave mode (external clock) delay

tNEKHOX

2—

SPI inputs—Master mode (internal clock input setup time

tNIIVKH

4—

SPI inputs—Master mode (internal clock input hold time

tNIIXKH

0—

SPI inputs—Slave mode (external clock) input setup time

tNEIVKH

4—

SPI inputs—Slave mode (external clock) input hold time

tNEIXKH

2—

Notes:

1. Output specifications are measured from the 50 percent level of the rising edge of CLKIN to the 50 percent level of the signal.

Timings are measured at the pin.

2. The symbols for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs

and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tNIKHOX symbolizes the internal timing

(NI) for the time SPICLK clock reference (K) goes to the high state (H) until outputs (O) are invalid (X).

Table 49. SPI DC Electrical Characteristics (continued)

Parameter

Symbol

Condition

Min

Max

Unit

Output

Z0 = 50 Ω

OVDD/2

RL = 50 Ω

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