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MPC8343VRADDB 数据表(PDF) 36 Page - Freescale Semiconductor, Inc |
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MPC8343VRADDB 数据表(HTML) 36 Page - Freescale Semiconductor, Inc |
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36 / 79 page ![]() MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 10 36 Freescale Semiconductor JTAG Figure 21. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV] = 4 (DLL Enabled) 11 JTAG This section describes the DC and AC electrical specifications for the IEEE Std. 1149.1 (JTAG) interface of the MPC8343EA. 11.1 JTAG DC Electrical Characteristics Table 36 provides the DC electrical characteristics for the IEEE Std. 1149.1 (JTAG) interface of the MPC8343EA. Table 36. JTAG Interface DC Electrical Characteristics Parameter Symbol Condition Min Max Unit Input high voltage VIH —OVDD –0.3 OVDD +0.3 V Input low voltage VIL —–0.3 0.8 V Input current IIN —— ±5 μA Output high voltage VOH IOH = –8.0 mA 2.4 — V LSYNC_IN UPM Mode Input Signal: LUPWAIT tLBIXKH2 tLBIVKH2 tLBIVKH1 tLBIXKH1 tLBKHOZ1 T1 T3 Input Signals: LAD[0:31]/LDP[0:3] UPM Mode Output Signals: LCS[0:3]/LBS[0:3]/LGPL[0:5] GPCM Mode Output Signals: LCS[0:3]/LWE tLBKHOV1 tLBKHOV1 tLBKHOZ1 T2 T4 |
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