LTC4100 datasheet(22/48 Pages) LINER

22 / 48 page

LTC1760

1760fa

TERMINATE_CHARGE_RESERVED Bit

ThereadonlyTERMINATE_CHARGE_RESERVEDbitisused

by the LTC1760 to determine if charging may continue.

Allowed values are:

1b: The LTC1760 will not charge this battery.

0b: The LTC1760 may charge this battery if other

conditions permit charging.

OVER_TEMP_ALARM Bit

The read only OVER_TEMP_ALARM bit is used by the

LTC1760 to determine if charging may continue.

Allowed values are:

1b: The LTC1760 will not charge this battery.

0b: The LTC1760 may charge this battery if other

conditions permit charging.

TERMINATE_DISCHARGE_ALARM Bit

The read only TERMINATE_DISCHARGE_ALARM bit is

used by the LTC1760 to determine if discharge from the

battery is still allowed. This is used for PowerPath man-

agement and battery calibration.

Allowed values are:

1b: The LTC1760 will terminate calibration and should

try to not use this battery in the power path. When all

other power paths fail the LTC1760 will ignore this

alarm and still try to supply system power from this

battery.

0b: The LTC1760 may continue discharging this battery.

FULLY_DISCHARGED Bit

The read only FULLY_DISCHARGED bit is used by the

LTC1760 to determine if discharge from the battery is

still allowed. This is used for PowerPath management

and battery calibration.

Allowed values are:

1b: The LTC1760 will terminate calibration and should

try to not use this battery in the power path. When

all other power paths fail the LTC1760 will ignore this

alarm and still try to supply system power from this

battery.

0b: The LTC1760 may continue discharging this battery.

OPERATION

2.3.11 AlertResponse()

Description:

The SMBus Host uses the Alert Response Address (ARA) to

simultaneously address all devices on the SMBus and de-

termine which devices are currently asserting SMBALERT.

Purpose:

This command allows the SMBus Host to identify the

subset of devices that have new status data. This reduces

the number of reads required to refresh all status infor-

mation from the system. The SMBus Host begins an ARA

by transmitting the 8-bit address, 0

×18, to all devices.

ARA-compliant devices that are asserting SMBALERT

will then simultaneously return their address on the next

read byte. While transmitting their address each device

monitors SDA. If a lower address is present, the device

transmitting the higher address will see that SDA does not

match and it will stop transmitting its address. When a

device sees its full address has been received it will stop

asserting SMBALERT and the Host will know to read status

from this device. Subsequent ARA requests will allow the

Host to complete the list of devices requiring servicing.

Output:

The LTC1760 will transmit its 8-bit address, 0x14, in

response to an ARA request. The LTC1760 will stop trans-

mitting its address if another device with a lower address

is also responding to the ARA. The LTC1760 will de-assert

SMBALERT when it successfully returns its address.

The following events will cause the LTC1760 to pull-down

the SMBALERT# bus through the SMBALERT pin:

• Change of AC_PRESENT in the

BatterySystemStateCont() function.

• Change of BATTERY_PRESENT in the BatterySys-

temState() function.

• Internal power on reset condition.

Refer to “Section 2.2” for bit mapping.

2.4 SMBus Dual Port Operation

The SMBus Interface includes the LTC1760’s SMBus

controller, as well as circuitry to arbitrate and connect the

battery and SMBus Host interfaces. The SMBus controller

generates and interprets all LTC1760 SMBus functions.

LTC4100 数据表(PDF) 22 Page - Linear Technology

LTC4100 数据表(HTML) 22 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

数据表下载

链接网址

LTC4100 数据表(PDF) 22 Page - Linear Technology

LTC4100 数据表(HTML) 22 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

数据表 下载

链接网址

数据表下载