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LTC1760

1760fa

The relatively high ESR of an aluminum electrolytic for

C15, located at the AC adapter input terminal, is helpful

in reducing ringing during the hot-plug event. Refer to

AN88 for more information.

Highest possible voltage rating on the capacitor will

minimize problems. Consult with the manufacturer before

use. Alternatives include new high capacity ceramic (at

least 20μF) from Tokin, United Chemi-Con/Marcon, et al.

Other alternative capacitors include OSCON capacitors

from Sanyo.

The output capacitor (COUT) is also assumed to absorb

output switching current ripple. The general formula for

capacitor current is:

IRMS =

(L1)(f)

VBAT

VDCIN

()

0.29 (VBAT) 1 –

For example:

VDCIN = 19V, VBAT = 12.6V, L1 = 10μH, and

f = 300kHz, IRMS = 0.41A.

EMI considerations usually make it desirable to minimize

ripple current in the battery leads, and beads or inductors

may be added to increase battery impedance at the 300kHz

switching frequency. Switching ripple current splits be-

tween the battery and the output capacitor depending on

the ESR of the output capacitor and the battery impedance.

If the ESR of COUT is 0.2Ω and the battery impedance is

raised to 4Ω with a bead or inductor, only 5% of the cur-

rent ripple will flow in the battery.

PowerPath and Charge MUX MOSFET Selection

Three pairs of P-channel MOSFETs must be used with

the wall adapter and the two battery discharge paths. Two

pairs of N-channel MOSFETs must be used with the battery

charge path. The nominal gate drive levels are set by the

clamp drive voltage of their respective control circuitry.

This voltage is typically 6.25V. Consequently, logic-level

threshold MOSFETs must be used. Pay close attention to

the BVDSS specification for the MOSFETs as well; many of

the logic level MOSFETs are limited to 30V or less.

Selection criteria for the power MOSFETs include the “ON”

resistance RDS(ON), input voltage and maximum output

current. For the N-channel charge path, the maximum cur-

rent is the maximum programmed current to be used. For

the P-channel discharge path maximum current typically

occurs at end of life of the battery when using only one

battery. The upper limit of RDS(ON) value is a function of

the actual power dissipation capability of a given MOSFET

package that must take into account the PCB layout. As a

starting point, without knowing what the PCB dissipation

capability would be, derate the package power rating by

a factor of two.

DS(ON)MAX =

MOSFET

MAX

()2

If you are using a dual MOSFET package with both MOSFETs

in series, you must cut the package power rating in half

again and recalculate.

DS(ON)MAX =

MOSFETDUAL

MAX

()2

If you use identical MOSFETs for both battery paths,

voltage drops will track over a wide current range. The

LTC1760 linear 25mV CV drop regulation will not occur

until the current has dropped below:

LINEARMAX =

25mV

DS(ON)MAX

However, if you try to use the above equation to determine

RDS(ON) to force linear mode at full current, the MOSFET

RDS(ON) value becomes unreasonably low for MOSFETs

available at this time. The need for the LTC1760 voltage

drop regulation only comes into play for parallel battery

configurations that terminate charge or discharge using

voltage. At first this seems to be a problem, but there are

several factors helping out:

1. When batteries are in parallel current sharing, the cur-

rent flow through any one battery is less than if it is

running stand-alone.

2. Most batteries that charge in constant voltage mode,

such as Li-ion, charge terminate at a current value of

C/10 or less which is well within the linear operation

range of the MOSFETs.

3. Voltage tracking for the discharge process does not

need such precise voltage tracking values.

APPLICATIONS INFORMATION

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