数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

LTC4100 数据表(PDF) 34 Page - Linear Technology

部件名 LTC4100
功能描述  Dual Smart Battery System Manager Available in 48-Lead TSSOP Package
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC4100 数据表(HTML) 34 Page - Linear Technology

Back Button LTC4100 Datasheet HTML 30Page - Linear Technology LTC4100 Datasheet HTML 31Page - Linear Technology LTC4100 Datasheet HTML 32Page - Linear Technology LTC4100 Datasheet HTML 33Page - Linear Technology LTC4100 Datasheet HTML 34Page - Linear Technology LTC4100 Datasheet HTML 35Page - Linear Technology LTC4100 Datasheet HTML 36Page - Linear Technology LTC4100 Datasheet HTML 37Page - Linear Technology LTC4100 Datasheet HTML 38Page - Linear Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 34 / 48 page
background image
LTC1760
34
1760fa
Figure 6. PowerPath Driver Equivalent Circuit
+
+
GB1I
GB1O
Q8
Q7
FROM
BATTERY
1
BAT1
SCP
25mV
20mV
OFF
OFF
1760 F06
EAP
CP
SWP
TO LOAD
CL
RSC
OPERATION
8.1 Autonomous PowerPath Switching
The LOPWR comparator monitors the voltage at the
load through the resistor divider from pin SCN. If LTC
(POWER_OFF) is low and the LOPWR comparator trips,
then all of the switches are turned on (3-Diode mode)
by the Autonomous PowerPath Controller to ensure that
the system is powered from the source with the highest
voltage. The Autonomous PowerPath Controller waits
approximately 1 second, to allow power to stabilize, and
then reverts back to the PowerPath switch configuration
requested by the PowerPath Management Algorithm. A
power fail counter is incremented to indicate that a failure
has occurred. If the power fail counter equals a value of 3,
then the the Autonomous PowerPath Controller sets the
switches to 3-Diode mode and BatterySystem-
StateCont(POWER_NOT_GOOD) will be set, provided
the LOPWR comparator is still detecting a low power
event. This is a three-strikes-and-you’re-out process
which is intended to debounce the POWER_NOT_GOOD
indicator. The power fail counter is reset when battery or
AC presence change.
8.2 Short-Circuit Protection
Short-circuit protection operates in both a current mode
and a voltage mode. If the voltage between SCP and
SCN exceeds the short-circuit comparator threshold
VTSC for more than 15ms, then all of the PowerPath
switches are turned off and BatterySystemState-Cont
(POWER_NOT_GOOD) is set. Similarly, if the voltage
at SCN falls below 3V for more than 15ms, then all of
the PowerPath switches are turned off and POWER_
NOT_GOOD is set high. The POWER_NOT_GOOD bit is
reset by removing all power sources and allowing the
voltage at VPLUS to fall below the UVLO threshold. If
the POWER_NOT_GOOD bit is set, charging is disabled
until VPLUS exceeds the UVLO threshold and the Charger
Algorithm allows charging to resume.
When a hard short-circuit occurs, it might pull all of the
power sources down to near 0V potentials. The capacitors
on VCC and VPLUS must be large enough to keep the circuit
operating correctly during the 15ms short-circuit event.
The charger will stop within a few microseconds, leaving
a small current which must be provided by the capacitor
on VPLUS. The recommended minimum values (1μF on
VPLUS and 2μF on VCC, including tolerances) should keep
the LTC1760 operating above the UVLO trip voltage long
enough to perform the short-circuit function when the
input voltages are greater than 8V. Increasing the capaci-
tor across VCC to 4.7μF will allow operation down to the
recommended 6V minimum.
8.3 Emergency Turn-Off
All of the PowerPath switches can be forced off by set-
ting the DCDIV pin to a voltage between 8V and 10V. This
will have the same effect as a short-circuit event. DCDIV
must be less than 5V and VPLUS must decrease below
the UVLO threshold to re-enable the PowerPath switches.
The LTC1760 can recover from this condition without
removing power. Contact Applications Engineering for
more information.
8.4 Power-Up Strategy
All three PowerPath switches are turned on after VPLUS
exceeds the UVLO threshold for more than 250ms. This
delay is to prevent oscillation from a turn-on transient
near the UVLO threshold.
9 The Voltage DAC Block
The voltage DAC (VDAC) is a delta-sigma modulator
which controls the effective value of an internal resistor,
RVSET = 7.2k, used to program the maximum charger volt-
age. Figure 7 is a simplified diagram of the VDAC operation.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com