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ADAU1373BCBZ-R7 数据表(PDF) 64 Page - Analog Devices |
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ADAU1373BCBZ-R7 数据表(HTML) 64 Page - Analog Devices |
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64 / 296 page  ADAU1373 Rev. 0 | Page 64 of 296 Worked Examples The following examples illustrate how to calculate the coefficients for the desired peak and low-pass/high-pass shelving filter. Low-Pass Shelving Filter If Band 6 is intended to operate as a low-pass shelving filter and the cutoff frequency of the filter is 80 Hz, peak gain is 6 dB, and input signal sampling frequency is 48 kHz, the coefficients are as follows: ) 20 6 ( 10 = k = 1.995262314968880 ) 2 48000 80 cos( )) 2 48000 80 sin( 1 ( π π α × × − = = 0.989582475318754 2 ) 1 ( ) 1 ( α × − + + = k k p0 = 1.005184084865251 2 ) 1 ( ) 1 ( α × + − − = k k p1 = −0.984398390453503 p2 = 0 d1 = α = 0.989582475318754 d2 = 0 1. Transfer the coefficients to integer numbers: p0 = round(1.005184084865251 × 8192) = 8234 p1 = round(−0.984398390453503 × 8192) = −8064 p2 = 0 d1 = round(0.989582475318754 × 8192) = 8107 d2 = 0 2. Represent the integer coefficients by 16-bit, twos complement hexadecimal values: p0 = 16-bit 0x202A p1 = 16-bit 0xE080 p2 = 16-bit 0x0000 d1 = 16-bit 0x1FAB d2 = 16-bit 0x0000 3. Therefore, the registers representing EQ1 coefficients should be set as follows: EQ6 COEF0M = 8’0x20, EQ6 COEF0L = 8’0x2A; EQ6 COEF1M = 8’0xE0, EQ6 COEF1L = 8’0x80; EQ6 COEF2M = 8’0x1F, EQ6 COEF2L = 8’0xAB Peak Filter If Band 1 is intended to operate as a peak filter with a filter center frequency of 240 Hz, the bandwidth is 120 Hz, peak gain is 6 dB, and the input signal sampling frequency is 48KHz, then the coefficients are as follows: ) 20 6 ( 10 = k = 1.995262314968880 ) 2 4800 120 cos( )) 2 48000 120 sin( 1 ( π π α × × − = = 0.984414127416097 ) 2 48000 240 cos( π β × = = 0.999506560365732 2 ) 1 ( ) 1 ( α × − + + = k k p0 = 1.007756015814333 p1 = −(1 + α) × β = −1.983434938834828 p2 = 2 ) 1 ( ) 1 ( α × + + − k k = 0.976658111601764 d1 = (1 + α) × β = 1.983434938834828 d2 = − α = −0.984414127416097 1. Transfer the coefficients to integer numbers: p0 = round(1.007756015814333 × 8192) = 8256 p1 = round(−1.983434938834828 × 8192) = −16248 p2 = round(0.976658111601764 × 8192) = 8000 d1 = round(1.983434938834828 × 8192) = 16248 d2 = round(−0.984414127416097 × 8192) = −8064 2. Represent the integer coefficients by 16-bit, twos complement hexadecimal values: p0 = 16-bit 0x2040 p1 = 16-bit 0x1F40 p2 = 16-bit 0x1F41 d1 = 16-bit 0x3F78 d2 = 16-bit 0xE080 3. Therefore, the registers representing EQ1 coefficients should be set as follows: EQ1 COEF0M = 8’0x20, EQ1 COEF0L = 8’0x40; EQ1 COEF1M = 8’0x1F, EQ1 COEF1L = 8’0x40; EQ1 COEF2M = 8’0x1F, EQ1 COEF2L = 8’0x41; EQ1 COEF3M = 8’0x3F, EQ1 COEF3L = 8’0x78; EQ1 COEF4M = 8’0xE0, EQ1 COEF4L = 8’0x80 |
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