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ADAU1373BCBZ-R7 数据表(PDF) 14 Page - Analog Devices |
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ADAU1373BCBZ-R7 数据表(HTML) 14 Page - Analog Devices |
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14 / 296 page ![]() ADAU1373 Rev. 0 | Page 14 of 296 Parameter Test Conditions/Comments Min Typ Max Unit IRQ RESPONSE TIME ASRCx_IRQ_STATUS One clock cycle = 1/256 × fS = 81.4 ns at fS = 48 kHz 4 Clock cycles DRC_IRQ_STATUS, PLL_UNLOCK_STATUS 3 Clock cycles HP_CFG_STATUS, HP_DECT_STATUS, AFAULT_STATUS 256 ms + 3 Clock cycles JACK DETECT Debounce Time 128 ms DIGITAL MICROPHONE INPUT Clock Output Frequency Depends on internal sample rate = 64 × fS 3.072 MHz Decimator Operating Frequency Depends on internal sample rate = 128 × fS 6.144 MHz |
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