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ADAU1373BCBZ-R7 数据表(PDF) 222 Page - Analog Devices |
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ADAU1373BCBZ-R7 数据表(HTML) 222 Page - Analog Devices |
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222 / 296 page ![]() ADAU1373 Rev. 0 | Page 222 of 296 Bits Bit Name Settings Description Reset Access [3:0] DRCLELDEC DRC3 Peak Detector Decay Time. 0x8 RW 0000 750 μs 0001 1.5 ms 0010 3 ms 0011 6 ms 0100 12 ms 0101 24 ms 0110 48 ms 0111 96 ms 1000 192 ms (default) 1001 384 ms 1010 768 ms 1011 1.536 sec 1100 3.072 sec 1101 6.144 sec 1110 12.288 sec 1111 24.576 sec DRC3_CTRL3 REGISTER Address: 0xA2, Reset: 0x00, Name: DRC3_CTRL3 DRC3 Threshold Point X1 on X-Axis (Input Level) Table 185. Bit Descriptions for DRC3_CTRL3 Bits Bit Name Settings Description Reset Access [7:0] DRCTHX1 DRC3 X-Axis Threshold 1. 0x00 RW 00000000 0 dB (default) 00000001 −0.5 dB 00000010 −1 dB xxxxxxxx 0.5 dB step 11000000 −96 dB |
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