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ADAU1373BCBZ-R7 数据表(PDF) 255 Page - Analog Devices |
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ADAU1373BCBZ-R7 数据表(HTML) 255 Page - Analog Devices |
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255 / 296 page ![]() ADAU1373 Rev. 0 | Page 255 of 296 FDSP_SEL4 REGISTER Address: 0xDF, Reset: 0x00, Name: FDSP_SEL4 DSP Datapath Selection Control Register Table 227. Bit Descriptions for FDSP_SEL4 Bits Bit Name Settings Description Reset Access 7 RESERVED Reserved. 0x0 RW [6:4] BASS_EN_SEL Bass Enhancement Datapath Selection. 0x0 RW 000 None 001 Datapath 1 010 Datapath 2 011 Datapath 3 100 Datapath 4 101 Datapath 5 3 ALC_4CHEN ALC 4 Channel Input Enable. ALC 4 channel input enable/disable control. 0x0 RW 0 Disable 1 Enable [2:0] ALC_SEL ALC Datapath Selection. 0x0 RW 000 None 001 Datapath 1 010 Datapath 2 011 Datapath 3 100 Datapath 4 101 Datapath 5 |
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