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AD9577BCPZ-R7 数据表(PDF) 22 Page - Analog Devices

部件名 AD9577BCPZ-R7
功能描述  Clock Generator with Dual PLLs
PDF  44 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9577BCPZ-R7 数据表(HTML) 22 Page - Analog Devices

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AD9577
Data Sheet
Rev. 0 | Page 22 of 44
TYPICAL OUTPUT SIGNAL
5ns/DIV
Figure 20 Typical LVPECL Differential Output Trace, 156.25 MHz
5ns/DIV
Figure 21. Typical LVDS Differential Output Trace, 156.25 MHz
1ns/DIV
Figure 22. Typical CMOS Output Trace, 200MHz
1ns/DIV
Figure 23. Typical LVPECL Differential Output Trace, 625 MHz
1ns/DIV
Figure 24. Typical LVDS Differential Output Trace, 625 MHz
10ns/DIV
Figure 25. Typical REFOUT Output Trace, 25 MHz



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