ADIS16228SLASHPCBZ datasheet(7/28 Pages) AD

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Data Sheet

ADIS16228

Rev. B | Page 7 of 28

THEORY OF OPERATION

The ADIS16228 is a vibration sensing system that combines a

triaxial MEMS accelerometer with advanced signal processing.

The SPI-compatible port and user register structure provide

convenient access to frequency domain vibration data and many

user controls.

SENSING ELEMENT

Digital vibration sensing in the ADIS16228 starts with a MEMS

accelerometer core on each axis. Accelerometers translate linear

changes in velocity into a representative electrical signal, using

a micromechanical system like the one shown in Figure 5. The

mechanical part of this system includes two different frames

(one fixed, one moving) that have a series of plates to form

a variable, differential capacitive network. When experiencing

the force associated with gravity or acceleration, the moving

frame changes its physical position with respect to the fixed

frame, which results in a change in capacitance. Tiny springs

tether the moving frame to the fixed frame and govern the

relationship between acceleration and physical displacement.

A modulation signal on the moving plate feeds through each

capacitive path into the fixed frame plates and into a demodulation

circuit, which produces the electrical signal that is proportional

to the acceleration acting on the device.

MOVABLE

FRAME

UNIT

FORCING

CELL

UNIT SENSING

CELL

MOVING

PLATE

FIXED

PLATES

PLATE

CAPACITORS

ANCHOR

Figure 5. MEMS Sensor Diagram

SIGNAL PROCESSING

Figure 6 offers a simplified block diagram for the ADIS16228.

The signal processing stage includes time domain data capture,

digital decimation/filtering, windowing, FFT analysis, FFT

averaging, and record storage. See Figure 14 for more details

on the signal processing operation.

TRIAXIAL

MEMS

SENSOR

CLOCK

CONTROLLER

CAPTURE

BUFFER

CONTROL

REGISTERS

SPI

SIGNALS

OUTPUT

REGISTERS

TEMP

SENSOR

ADC

SCLK

DIN

DOUT

Figure 6. Simplified Sensor Signal Processing Block Diagram

USER INTERFACE

SPI Interface

The user registers (which include both the output registers and

the control registers, as shown in Figure 6) manage user access

to both sensor data and configuration inputs. Each 16-bit register

has its own unique bit assignment and two addresses: one for its

upper byte and one for its lower byte. Table 8 provides a memory

map for each register, along with its function and lower byte

address. The data collection and configuration command uses

the SPI, which consists of four wires. The chip select (CS) signal

activates the SPI interface, and the serial clock (SCLK)

synchronizes the serial data lines. Input commands clock into

the DIN pin, one bit at a time, on the SCLK rising edge. Output

data clocks out of the DOUT pin on the SCLK falling edge.

When the SPI is used as a slave device, the DOUT contents

reflect the information requested using a DIN command.

Dual-Memory Structure

The user registers provide addressing for all input/output operations

in the SPI interface. The control registers use a dual-memory

structure. The controller uses SRAM registers for normal

operation, including user-configuration commands. The flash

memory provides nonvolatile storage for control registers that

have flash backup (see Table 8). Storing configuration data

in the flash memory requires a manual flash update command

(GLOB_CMD[6] = 1, DIN = 0xBE40). When the device powers

on or resets, the flash memory contents load into the SRAM, and

the device starts producing data according to the configuration

in the control registers.

NONVOLATILE

FLASH MEMORY

(NO SPI ACCESS)

MANUAL

FLASH

BACKUP

START-UP

RESET

VOLATILE

SRAM

SPI ACCESS

Figure 7. SRAM and Flash Memory Diagram

ADIS16228/PCBZ 数据表(PDF) 7 Page - Analog Devices

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