ADIS16228SLASHPCBZ datasheet(11/28 Pages) AD

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Data Sheet

ADIS16228

Rev. B | Page 11 of 28

DATA RECORDING AND SIGNAL PROCESSING

The ADIS16228 provides a complete sensing system for recording

and monitoring vibration data. Figure 13 provides a simplified

block diagram for the signal processing associated with spectral

record acquisition on all three axes (x, y, z). User registers

provide controls for data type (time or frequency), trigger mode

(manual or automatic), collection mode (real time or capture),

sample rates/filtering, windowing, FFT averaging, spectral alarms,

and I/O management.

RECORDING MODE

The recording mode selection establishes the data type (time or

frequency domain), trigger type (manual or automatic), and

data collection (captured or real time). The REC_CTRL1[1:0]

bits (See Table 9) provide four operating modes: manual FFT,

automatic FFT, manual time capture, and real time. After setting

REC_CTRL1, the manual FFT, automatic FFT, and manual time

capture modes require a start command to start acquiring a

spectral or time domain record. There are two start command

options in this mode: SPI and I/O. The SPI trigger involves setting

GLOB_CMD[11] = 1 (DIN = 0xBF08). The I/O trigger involves

using DIO_CTRL (see Table 66) to configure DIO1 or DIO2 as

an input trigger line.

Table 9. REC_CTRL1 (Base Address = 0x1A), Read/Write

Bits

Description (Default = 0x1100)

[15:14]

Not used (don’t care).

[13:12]

Window setting.

00 = rectangular, 01 = Hanning, 10 = flat top, 11 = N/A.

SR3, 1 = enabled for FFT, 0 = disable.

Sample rate = 20,480 ÷ 2AVG_CNT[15:12] (see Table 11).

SR2, 1 = enabled for FFT, 0 = disable.

Sample rate = 20,480 ÷ 2AVG_CNT[11:8] (see Table 11).

SR1, 1 = enabled for FFT, 0 = disable.

Sample rate = 20,480 ÷ 2AVG_CNT[7:4] (see Table 11).

SR0, 1 = enabled for FFT, 0 = disable.

Sample rate = 20,480 ÷ 2AVG_CNT[3:0] (see Table 11).

Power-down between each recording. 1 = enabled.

[6:4]

Not used (don’t care).

[3:2]

Storage method.

00 = none, 01 = alarm trigger, 10 = all, 11 = N/A.

[1:0]

Recording mode.

00 = manual FFT, 01 = automatic FFT,

10 = manual time capture, 11 = real-time sampling/data

access.

Manual FFT Mode

Set REC_CTRL1[1:0] = 00 to place the device in manual FFT

mode. Then use a start command to trigger the production of a

spectral record. When the device is acquiring a spectral record,

use the busy indicator (DIO1, per factory default) to drive an

interrupt service line on an external processor, which can start

data collection after the process completes. DIAG_STAT is the

only register that the SPI can read while the device is processing

a command. Reading this register returns a 0x00 while the device

is busy and 0x80 when the data is ready for external access. When

the spectral record is complete, the device waits for another start

command.

Automatic FFT Mode

Set REC_CTRL1[1:0] = 01 to place the device in automatic FFT

mode. Use the REC_PRD register (see Table 10) to program the

period between production of each spectral record. Then use a

start command to trigger periodic acquistion of a spectral record.

For example, set REC_PRD = 0x020A (DIN = 0x9E0A, 0x9F02)

to set the trigger period to 10 hours.

Table 10. REC_PRD (Base Address = 0x1E), Read/Write

Bits

Description (Default = 0x0000)

[15:10]

Not used (don’t care)

[9:8]

Scale for data bits

00 = 1 second/LSB, 01 = 1 minute/LSB, 10 = 1 hour/LSB

[7:0]

Data bits, binary format; range = 0 to 255

Manual Time Capture Mode

Set REC_CTRL1[1:0] = 10 to place the device into manual time

capture mode; then use a manual trigger to start a data collection

cycle. When the device is operating in this mode, 512 samples

of time domain data are loaded into the buffer for each axis.

This data goes through all time domain signal processing, except

the pre-FFT windowing, prior to loading into the data buffer for

user access. The manual trigger options are the same as in the

manual FFT mode (SPI, I/O).

MEMS

ADC

PROCESSING

DATA

BUFFER

RECORDS

SPI AND

REGISTERS

Figure 13. Simplified Block Diagram

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