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AS5045ASST 数据表(PDF) 11 Page - ams AG

部件名 AS5045ASST
功能描述  12 Bit Programmable Magnetic Rotary Encoder
PDF  33 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS5045ASST 数据表(HTML) 11 Page - ams AG

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AS5045
Data Sheet
www.austriamicrosystems.com
Revision 1.7
11 – 33
6.7.2
Pulse Width Modulation Output
(operating conditions: Tamb = -40 to +125°C, VDD5V = 3.0~3.6V (3V operation) VDD5V = 4.5~5.5V (5V operation)
unless otherwise noted)
Parameter
Symbol
Min
Typ
Max
Unit
Note
232
244
256
Signal period = 4097µs
±5% at Tamb = 25°C
PWM frequency
f PWM
220
244
268
Hz
= 4097µs
±10% at Tamb = -40 to +125°C
Minimum pulse width
PW MIN
0.95
1
1.05
µs
Position 0d; Angle 0°
Maximum pulse width
PW MAX
3891
4096
4301
µs
Position 4095d; Angle 359.91°
Note: when OTP bit “PWMhalfEn” is set, the PWM pulse width PW is doubled (PWM frequency fPWM is divided by 2)
6.8
Programming Conditions
(operating conditions: Tamb = -40 to +125°C, VDD5V = 3.0~3.6V (3V operation) VDD5V = 4.5~5.5V (5V operation)
unless otherwise noted)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Programming enable time
t Prog enable
2
µs
Time between rising edge at
Prog pin and rising edge of CSn
Write data start
t Data in
2
µs
Write data valid
t Data in valid
250
ns
Write data at the rising edge of
CLK PROG
Load programming data
t Load PROG
3
µs
Rise time of VPROG before
CLKPROG
t PrgR
0
µs
Hold time of VPROG after
CLKPROG
t PrgH
0
5
µs
Write data – programming
CLKPROG
CLK PROG
250
kHz
Ensure that VPROG is stable with
rising edge of CLK
CLK pulse width
t PROG
1.8
2
2.2
µs
During programming; 16 clock
cycles
Hold time of Vprog after
programming
t PROG finished
2
µs
Programmed data is available
after next power-on
Programming voltage, pin
PROG
V PROG
7.3
7.4
7.5
V
Must be switched off after
zapping
Programming voltage off level
V ProgOff
0
1
V
Line must be discharged to this
level
Programming current
I PROG
130
mA
During programming
Analog read CLK
CLKAread
100
kHz
Analog Readback mode
Programmed Zener voltage
(log.1)
Vprogrammed
100
mV
Unprogrammed Zener voltage
(log. 0)
Vunprogrammed
1
V
VRef-VPROG during Analog
Readback mode (see 11.4)



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