SP7800ADS/02

SP7800A 12-Bit 3

µs Sampling A/D Converter

© Copyright 2000 Sipex Corporation

5

ing resistors provide industry–standard input ranges

of

±5Vor±10V.The24-pinSP7800Aisavailablein

plastic DIP, and SOIC packages and it operates from

a single +5V supply. The SP7800A is available in

grades specified over the 0

°C to +70°C commercial

temperature ranges.

edge of R/C will enable the output data pins, and

the data from the previous conversion becomes

valid. The falling edge then puts the SP7800A in

a hold mode, and initiates a new conversion.

The SP7800A will begin acquiring a new sample

just prior to BUSY output rising, and will track the

input signal until the next conversion is started.

For use with an 8-bit bus, the data can be read out

in two bytes under the control of HBE. With a

LOW input on HBE, at the end of a conversion, the

8 LSBs of data are loaded into the output drivers D

7

– D

4 MSBs on output drivers D

being forced LOW.

Analog Input Ranges

The SP7800A offers two standard bipolar input

ranges:

±10V and ±5V. If a ±10V range is re-

quired, the analog input signal should be con-

nected to pin 1. A signal requiring a

±5V range

should be connected to pin 2. In either case, the

other pin of the two must be grounded or connected

to the adjustment circuits described in the section

on calibration.

Controlling The SP7800A

The SP7800A can be easily interfaced to most

microprocessor-based and other digital systems. The

microprocessor may take full control of each conver-

sion, or the SP7800A may operate in a stand-alone

mode, controlled only by the R/C input. Full control

consists of initiating the conversion and reading the

output data at user command, transmitting data either

all 12-bits in one parallel word, or in two 8-bit bytes.

The three control inputs (CS, R/C and HBE) are all

TTL/CMOScompatible.Thefunctionsofthecontrol

lines are shown in Table 1.

For stand-alone operation, control of the SP7800A

is accomplished by a single control line connected

to R/C. In this mode, CS and HBE are connected

to GND. The output data are presented as 12-bit

words. The stand-alone mode is used in systems

containing dedicated input ports which do not

require full bus interface capability.

ConversionisinitiatedbyaHIGH-to-LOWtransition

OPERATION...

Basic Operation

Figure 1 shows the simple hookup circuit required

to operate the SP7800A in a

±10V range in the

Convert Mode. A convert command arriving on

R/C, (a pulse taking R/C LOW for a minimum of

40ns) puts the SP7800A in the HOLD mode, and

a conversion is started. The falling edge of R/C

establishes the sampling instant of the A/D; it must

therefore have very low jitter. BUSY will be held

LOW during the conversion, and rises only after

the conversion is completed and the data has been

transferred to the output drivers. Thus, the rising

edge can be used to read the data from the conver-

sion. Also, during conversion, the BUSY signal

puts the output data lines in Hi-Z states and inhibits

the input lines. This means that pulses on R/C are

ignored, so that new conversions cannot be initi-

ated during a conversion, either as a result of

spurious signals or to short-cycle the SP7800A.

In the Read Mode, the input to R/C is kept nor-

mally LOW, and a HIGH pulse is used to read data

and initiate a conversion. In this mode, the rising

Figure 1. Basic

±10V Operation

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

D0

(LSB)

Busy

Convert

Command

0.1µF

6.8µF +

+5V

+5V

+5V

N.C.

BUSY

CS

R/C

HBE

D0 (LSB)

D1

D2

D3

DGND

IN 1

IN 2

N.C.

AGND

D11 (MSB)

D10

D9

D8

D7

D6

D5

D4

D11

(MSB)

Data

Out

Input