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TNETX4090GGP 数据表(PDF) 10 Page - Texas Instruments

部件名 TNETX4090GGP
功能描述  ThunderSWITCH IIE 9-PORT 100-/1000-MBIT/S ETHERNETE SWITCH
PDF  78 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETX4090GGP 数据表(HTML) 10 Page - Texas Instruments

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TNETX4090
ThunderSWITCH II9-PORT 100-/1000-MBIT/S ETHERNETSWITCH
SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
100-/1000-Mbit/s MAC interface [media-independent interface (MII) mode]
TERMINAL
NAME
I/O
INTERNAL
RESISTOR
DESCRIPTION
M08_COL
I
Pulldown
Collision sense. Assertion of M08_COL during half-duplex operation indicates network collision.
Additionally, during full-duplex operation, transmission of new frames does not commence if this
terminal is asserted.
M08_CRS
I
Pulldown
Carrier sense. M08_CRS indicates a frame carrier signal is being received.
M08_EWRAP
O
None
Enable wrap. M08_EWRAP reflects the state of the loopback bit in the PCS8Control register.
M08_GTCLK
O
None
Unused. This terminal can be left unconnected.
M08_LINK
I
Pulldown
Connection status. M08_LINK indicates the presence of port connection.
– If M08_LINK = 0, there is no link.
– If M08_LINK = 1, the link is OK.
M08_LREF
O
None
Renegotiate. M08_LREF indicates to the attached PHY device that this device wishes to negotiate
a new configuration.
– Following a 0-to-1 transition of neg in PortxControl, M08_LREF is asserted low, and
remains low until M08_LINK goes low. If M08_LINK was already low, M08_LREF is still
activated for at least one cycle.
– M08_LREF is asserted low for as long as initd in SysControl = 0, regardless of the state
of M08_LINK.
M08_RCLK
I
Pullup
Receive clock. Receive clock source from the attached PHY or PMI device.
M08_RFCLK
I
Pullup
Transmit clock. Transmit clock from the attached PHY or PMI device.
M08_RXD7
M08_RXD6
I
Pullup
Unused. These terminals can be left unconnected.
M08_RXD5
I/O†
Pullup
IEEE Std 802.3x pause frame support selection
– If pulled low either internally or by the attached PHY or PMI device, M08_RXD5 causes the
port to not support pause frames.
– If not pulled low, the port does not support pause frames.
M08_RXD4
I/O†
Pullup
Duplex selection [force half duplex (active low)]
– If pulled low either internally or by the attached PHY or PMI device, the port operates in
half-duplex mode.
– If not pulled low, the port operates in full-duplex mode.
M08_RXD3
M08_RXD2
M08_RXD1
M08_RXD0
I
Pullup
Receive data. Nibble-wide receive data from the attached PHY or PMI device. When M08_RXDV
is asserted, these signals carry receive data. Data on these signals is synchronous to M08_RCLK.
M08_RXDV
I
Pulldown
Receive data valid. M08_RXDV indicates data on M08_RXD3–M08_RXD0 is valid. This signal is
synchronous to M08_RCLK.
M08_RXER
I
Pulldown
Receive error. Indicates reception of a coding error on received data.
M08_TXD7
M08_TXD6
M08_TXD5
M08_TXD4
O
None
Unused. These terminals can be left unconnected, but are driven low.
M08_TXD3
M08_TXD2
M08_TXD1
M08_TXD0
O
None
Transmit data. Nibble-wide transmit data. When M08_TXEN is asserted, these signals carry
transmit data. Data on these signals is synchronous to M08_RFCLK.
† Not a true bidirectional terminal. It can only be actively pulled down.



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