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TNETX4090GGP 数据表(PDF) 11 Page - Texas Instruments |
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TNETX4090GGP 数据表(HTML) 11 Page - Texas Instruments |
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11 / 78 page  TNETX4090 ThunderSWITCH II™ 9-PORT 100-/1000-MBIT/S ETHERNET™ SWITCH SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) 100-/1000-Mbit/s MAC interface [media-independent interface (MII) mode] (continued) TERMINAL NAME I/O INTERNAL RESISTOR DESCRIPTION M08_TXEN O None Transmit enable. M08_TXEN indicates valid transmit data on M08_TXD3–M08_TXD0. This signal is synchronous to M08_RFCLK. M08_TXER O None Transmit error. M08_TXER allows coding errors to be propagated between the MAC and the attached PHY. It is asserted at the end of an under-running frame, enabling the device to force a coding error. 10-/100-Mbit/s MAC interface (MII mode) (ports 0–7) TERMINAL I/O INTERNAL DESCRIPTION NAME NO. I/O RESISTOR DESCRIPTION M00_COL M01_COL M02_COL M03_COL M04_COL M05_COL M06_COL M07_COL C21 D16 C11 A6 H2 N2 V1 AC6 I Pulldown Collision sense. Assertion of Mxx_COL indicates network collision. In full-duplex mode, the port does not start transmitting a new frame if this signal is active; the value of this terminal is ignored at all other times. M00_CRS M01_CRS M02_CRS M03_CRS M04_CRS M05_CRS M06_CRS M07_CRS B21 C16 B11 B6 H1 P3 W3 AD6 I Pulldown Carrier sense. Indicates a frame-carrier signal is being received. M00_LINK M01_LINK M02_LINK M03_LINK M04_LINK M05_LINK M06_LINK M07_LINK B19 B14 A9 A4 L3 T2 AA1 AF3 I Pulldown Connection status. Indicates the presence of port connection: – If Mxx_LINK = 0, there is no link. – If Mxx_LINK = 1, the link is OK. An internal pullup resistor is provided. M00_RCLK M01_RCLK M02_RCLK M03_RCLK M04_RCLK M05_RCLK M06_RCLK M07_RCLK A21 B16 A11 C6 J3 P2 W2 AE6 I Pullup Receive clock. Receive clock source from the attached PHY device. |
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