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TNETA1585PCM 数据表(PDF) 20 Page - Texas Instruments |
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TNETA1585PCM 数据表(HTML) 20 Page - Texas Instruments |
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20 / 32 page ![]() TNETA1585 ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES SDNS041A – NOVEMBER 1996 – REVISED JULY 1998 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MAX UNIT TTL IOH = 8 mA VCC 06 VOH High level output voltage TTL IOH = 4 mA VCC – 0.6 V VOH High-level output voltage 5 V tolerant TTL IOH = 8 mA VCC 06 V 5-V tolerant TTL IOH = 4 mA VCC – 0.6 TTL IOL = 8 mA 0.4 VOL Low level output voltage TTL IOL = 4 mA 0.4 V VOL Low-level output voltage 5 V tolerant TTL IOL = 8 mA 0.4 V 5-V tolerant TTL IOL = 4 mA 0.4 IIH High level input current TTL VI = VIH (max), See Note 4 ±1 µA IIH High-level input current 5-V tolerant TTL VI = VIH (min) –760 µA IIL Low-level input current TTL VI =VIL (min) See Note 5 ±1 µA IIL Low-level in ut current 5-V tolerant TTL VI = VIL (min), See Note 5 ±1 µA IOZ High-impedance-state output current TTL ±20 µA IOZ High-im edance-state out ut current 5-V tolerant TTL ±20 µA NOTES: 4. These specifications apply only when the pulldown terminator is turned off. 5. These specifications apply only when the pullup terminator is turned off. recommended power-supply sequencing for mixed-voltage devices The recommended power-supply sequencing in a mixed-voltage system is as follows: • When the power supply is being turned on, all 3.3-V and 5-V supplies should start ramping from 0 V and reach 95 percent of their end-point values within a 25-ms time window. All bus contention between the TNETA1585 and external devices is eliminated by the end of the 25-ms time window. The preferred order of supply ramping is to ramp the 3.3-V supply followed by the 5-V supply. This order is not mandatory, but it allows a larger cumulative number of power-supply on events than the reverse order. • When the power supply is being turned off, all 3.3-V and 5-V supplies should start ramping from steady state values and reach 5 percent of these values within a 25-ms time window. All bus contention between the TNETA1585 and external devices is eliminated by the end of the 25-ms time window. The preferred order of supply ramping is to ramp down the 5-V supply followed by the 3.3-V supply. This order is not mandatory, but it allows a larger cumulative number of power-supply off events than the reverse order. If these precautions and guidelines are not followed, the TNETA1585 device may experience failures. |
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