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TNETA1585PCM 数据表(PDF) 10 Page - Texas Instruments

部件名 TNETA1585PCM
功能描述  ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
PDF  32 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETA1585PCM 数据表(HTML) 10 Page - Texas Instruments

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TNETA1585
ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE
WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
SDNS041A – NOVEMBER 1996 – REVISED JULY 1998
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
RM-cell-contents FIFO A
When the TNETA1575 reads the next-cell register and an indication is given that an RM cell should be sent from
the RM-cell-contents FIFO A, the TNETA1575 must make 12 accesses to control-memory location 10001h to
fetch one entire cell payload. The data that is returned by the TNETA1585 is in big-endian format as follows:
Byte 0 (31–24)
Byte 1 (23–16)
Byte 2 (15–8)
Byte 3 (7–0)
The ordering and formatting of data (as it is sequentially read from this register) is:
Word 0 – Bytes 0, 1, 2, 3
Word 1 – Bytes 0, 1, 2, 3
RM-cell-contents FIFO B
When the TNETA1575 reads the next-cell register and an indication is given that an RM cell should be sent from
the RM-cell-contents FIFO B, the TNETA1575 must make 12 accesses to control-memory location 10002h to
fetch one entire cell payload. The data that is returned by the TNETA1585 is in big-endian format as follows:
Byte 0 (31–24)
Byte 1 (23–16)
Byte 2 (15–8)
Byte 3 (7–0)
The ordering and formatting of data (as it is sequentially read from this register) is:
Word 0 – Bytes 0, 1, 2, 3
Word 1 – Bytes 0, 1, 2, 3
RM-cell-contents FIFO C
When the TNETA1575 reads the next-cell register and an indication is given that an RM cell should be sent from
the RM-cell-contents FIFO C, the TNETA1575 must make 12 accesses to control-memory location 10003h to
fetch one entire cell payload. The data that is returned by the TNETA1585 is in big-endian format as follows:
Byte 0 (31–24)
Byte 1 (23–16)
Byte 2 (15–8)
Byte 3 (7–0)
The ordering and formatting of data (as it is sequentially read from this register) is:
Word 0 – Bytes 0, 1, 2, 3
Word 1 – Bytes 0, 1, 2, 3



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