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L6360 数据表(PDF) 21 Page - STMicroelectronics |
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L6360 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 65 page ![]() L6360 Device configuration Doc ID 022817 Rev 2 21/65 6.1.7 Communication flow The communication is managed by the microcontroller that generates the clock signal. A serial data transfer always begins with a START condition and ends with a STOP condition. Data is transferred as 8-bit bytes, MSB first. The first byte following the START condition contains the address (7 bits). A 9th clock pulse follows the 8th clock cycle of a byte transfer, during which the receiver must send an acknowledge bit to the transmitter. Figure 8. I2C communication Each byte is followed by an acknowledgment bit as indicated by the A or A blocks in the sequence. A START condition immediately followed by a STOP condition (void message) is a prohibited format. 6.1.8 I2C address Each I2C connected to the bus is addressable by a unique address. The I2C address is 7 bits long, and there is a simple master/slave relationship. The LSB of the L6360 address can be programmed by means of dedicated IC pins (SA0, SA1 and SA2, which can be hard wired to VDD or GND, or handled by µC outputs): the microcontroller can interface up to 8 L6360 ICs. The I2C inside the device has 5 pins: ● SDA: data ● SCL: clock ● SA0: LSB of L6360 address ● SA1: bit 1 of L6360 address ● SA2: bit 2 of L6360 address |
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