L6360 datasheet(36/65 Pages) STMICROELECTRONICS

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Device configuration

L6360

36/65

Doc ID 022817 Rev 2

6.2

Interrupt

The IRQ pin (interrupt pin) should normally be held to a high logic level by an external pull-

up resistor or microcontroller pin configuration. The internal structure is an open drain

transistor.

It should be connected directly to the microcontroller so, in the case of a fault event (C/Q

overload, power-on L+ line, overtemperature condition, etc.), it is pulled down to a low logic

level, reporting the fault condition to the microcontroller. See also the Status register section.

LED2 register MSB

Bit 7

L2R15

Bit 6

L2R14

Bit 5

L2R13

Bit 4

L2R12

Bit 3

L2R11

Bit 2

L2R10

Bit 1

L2R9

Bit 0

L2R8

LED2 register LSB

Bit 7

L2R7

Bit 6

L2R6

Bit 5

L2R5

Bit 4

L2R4

Bit 3

L2R3

Bit 2

L2R2

Bit 1

L2R1

Bit 0

L2R0

Parity register

Bit 7

Bit 6

Bit 5

CT1

Bit 4

CT2

Bit 3

L1H

Bit 2

L1L

Bit 1

L2H

Bit 0

L2L

Table 26.

Registers default configuration (continued)

Registers

Bit position

Bit name

Reset value

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