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L6360 数据表(PDF) 30 Page - STMicroelectronics |
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L6360 数据表(HTML) 30 Page - STMicroelectronics |
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30 / 65 page ![]() Device configuration L6360 30/65 Doc ID 022817 Rev 2 Configuration register Read/write Reset value: [100xxxxx] Figure 15. Configuration register The configuration register holds data to configure the L6360 IC. Bit 7:5 = C/Q[2:0]: C/Q output stage configuration Table 24. C/Q output stage configuration C/Q[2] C/Q[1] C/Q[0] Configuration Notes 000 OFF HS and LS are OFF regardless of the state of ENC/Q and INC/Q. The receiver is OFF regardless of the state of ENC/Q. 0 0 1 Low-side HS is always disabled. LS is ON when INC/Q is high and ENC/Q is high, OFF in all other cases. Slow asynchronous decay when the LS is turned off by ENC/Q or in case of cutoff. The receiver is OFF when ENC/Q is high: OUTC/Q is high. The receiver is ON when ENC/Q is low: if C/QI is high, OUTC/Q is low. if C/QI is low, OUTC/Q is high. 010 High-side LS is always disabled. HS is ON when INC/Q is low and ENC/Q is high, OFF in all other cases. Slow asynchronous decay if the HS is turned off by ENC/Q or in case of cutoff. The internal pull-down current generator on C/QI should be disabled through Control register 1, unless C/QI is connected to C/QO through a 100 Ω (or more) resistor. The receiver is OFF when ENC/Q is high: OUTC/Q is high. The receiver is ON when ENC/Q is low: if C/QI is high, OUTC/Q is low. if C/QI is low, OUTC/Q is high. |
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