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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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SPIRIT1 数据表(PDF) 61 Page - STMicroelectronics |
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SPIRIT1 数据表(HTML) 61 Page - STMicroelectronics |
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61 / 94 page  SPIRIT1 Transmission and reception Doc ID 022758 Rev 3 61/94 9.9 Data FIFO In the SPIRIT1 there are two data FIFOs, a TX FIFO for data to be transmitted and an RX FIFO for the received data. The length of both FIFOs is 96 bytes. The SPI interface is used to read from the RX FIFO and write to the TX FIFO (see Figure 10) starting from the address 0xFF. Figure 10. Threshold of the linear FIFO The FIFO has two programmable thresholds: FIFO almost full and FIFO almost empty. The FIFO almost full event occurs when the data crosses the threshold from below to above. The TX FIFO almost empty threshold can be configured using the field txaethr in the FIFO_CONFIG[0] register. The RX FIFO almost empty threshold can be configured using the field rxaethr in the FIFO_CONFIG[2] register. The FIFO almost empty event occurs when the data crosses the threshold from above to below. The TX FIFO almost full threshold can be configured using the field txafthr in the FIFO_CONFIG[1] register. The RX FIFO almost full threshold can be configured using the field rxafthr in the FIFO_CONFIG[3] register. |
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