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SPIRIT1 数据表(PDF) 87 Page - STMicroelectronics |
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SPIRIT1 数据表(HTML) 87 Page - STMicroelectronics |
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87 / 94 page  SPIRIT1 Register table Doc ID 022758 Rev 3 87/94 Table 41. Frequently used registers Register name Address Bit Field Name Reset R/W Description CHNUM 0x6C 7:0 CH_NUM 0 R/W Channel number. This value is multiplied by the channel spacing and added to the synthesizer base frequency to generate the actual RF carrier frequency. See Equation 1 VCO_CONFIG 0xA1 7:6 Reserved 00 R/W 5:0 VCO_GEN_CURR 010001 Set the VCO current RCO_VCO_CALIBR_IN [2] 0x6D 7:4 RWT_IN[3:0] 0111 R/W RWT word value for the RCO 3:0 RFB_IN[4:1] 0000 RFB word value for the RCO RCO_VCO_CALIBR_IN [1] 0x6E 7 RFB_IN[0] 0 R/W 6:0 VCO_CALIBR_TX[6: 0] 10010 00 Word value for the VCO to be used in TX mode RCO_VCO_CALIBR_IN [0] 0x6F 7 Reserved 0 R/W 6:0 VCO_CALIBR_RX[6: 0] 10010 00 Word value for the VCO to be used in RX mode AES_KEY_IN[15] 0x70 7:0 AES_KEY15 0 R/W AES engine key input (128 bits) AES_KEY_IN[14] 0x71 7:0 AES_ KEY14 0 R/W AES engine key input (128 bits) …7:0 … … … … AES_KEY_IN[1] 0x7E 7:0 AES_ KEY1 0 R/W AES engine key input (128 bits) AES_KEY_IN[0] 0x7F 7:0 AES_ KEY0 0 R/W AES engine key input (128 bits) AES_DATA_IN[15] 0x80 7:0 AES_IN15 0 R/W AES engine data input (128 bits) AES_DATA_IN[14] 0x81 7:0 AES_IN14 0 R/W AES engine data input (128 bits) …… … … … … AES_DATA_IN[1] 0x8E 7:0 AES_IN1 0 R/W AES engine data input (128 bits) AES_DATA_IN[0] 0x8F 7:0 AES_IN0 0 R/W AES engine data input (128 bits) IRQ_MASK[3] 0x90 7:0 INT_MASKT[31:24] 0 R/W The IRQ mask register to route the IRQ information to a GPIO. See Table 12. IRQ_MASK[2] 0x91 7:0 INT_MASK [23:16] 0 R/W The IRQ mask register to route the IRQ information to a GPIO. See Table 12. IRQ_MASK[1] 0x92 7:0 INT_MASK[15:8] 0 R/W The IRQ mask register to route the IRQ information to a GPIO. See Table 12. |
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