SPIRIT1 datasheet(44/94 Pages) STMICROELECTRONICS

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Transmission and reception

SPIRIT1

44/94

Doc ID 022758 Rev 3

Transmission and reception

9.1

PA configuration

The PA output power level can be configured by programming the PA_POWER[8:0] register

bank. The user can store up to eight output levels to provide flexible PA power ramp-up and

ramp-down at the start and end of a frequency modulation transmission as well as ASK

modulation shaping.

The power levels of the ramp are controlled by 7-bit words (PA_LEVEL_x, x=0

−7),

according to the following table:

The power ramping is enabled by the PA_RAMP_ENABLE bit. If enabled, the ramp starts

from the level defined by the word PA_LEVEL_0 and stops at the level defined by the word

PA_LEVEL_x, where x is the value of the 3-bit field PA_LEVEL_MAX_INDEX. So, a

maximum of 8 steps can be set up. Figure 8 describes the levels table and shows some

examples.

Each step is held for a time interval defined by the 2-bit field PA_RAMP_STEP_WIDTH. The

step width is expressed in terms of bit period units (Tb/8), maximum value is 3 (which means

4×Tb/8=Tb/2). Therefore the PA ramp may last up to 4 Tb (about 3.3 ms if the bit rate is 1.2

kbit/s).

Table 24.

PA_level

PA_LEVEL_x

Comment

POUT [dBm]

(170MHz)

No output power: output stage in high impedance

mode and all circuits switched off.

Maximum output power

…

-6

…

Minimum level

-34

91-127

Reserved

N/A

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