WM8945ECSSLASHR datasheet(67/169 Pages) WOLFSON

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Production Data

WM8945

PD, May 2011, Rev 4.1

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

1:0

FMT [1:0]

Digital Audio Interface Format

00 = Reserved

01 = Left Justified

10 = I2S format

11 = DSP/PCM mode

R21 (15h)

DAC Control 1

DACL_DATINV

Left DAC Invert

0 = Left DAC output not inverted

1 = Left DAC output inverted

R25 (19h)

ADC Control 1

ADCL_DATINV

Left ADC Invert

0 = Left ADC output not inverted

1 = Left ADC output inverted

Table 44 Audio Data Format Control

In Left Justified mode, the MSB is available on the first rising edge of BCLK following a LRCLK

transition. The other bits up to the LSB are then transmitted in order. Depending on word length,

BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition.

Figure 22 Left Justified Audio Interface (assuming n-bit word length)

In I

2S mode, the MSB is available on the second rising edge of BCLK following a LRCLK transition.

The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK

frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and

the MSB of the next.

Figure 23 I

2S Justified Audio Interface (assuming n-bit word length)

In DSP/PCM mode, the left channel MSB is available on either the 1

st (mode B) or 2nd (mode A) rising

edge of BCLK (selected by LRCLK_INV) following a rising edge of LRCLK. Right channel data

immediately follows left channel data. Depending on word length, BCLK frequency and sample rate,

there may be unused BCLK cycles between the LSB of the right channel data and the next sample.

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