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CS5490 数据表(PDF) 37 Page - Cirrus Logic |
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CS5490 数据表(HTML) 37 Page - Cirrus Logic |
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37 / 56 page ![]() CS5490 DS982F2 37 6.6.10 Phase Sequence Detection and Control (PSDC) – Page 0, Address 48 Default = 0x00 0000 DONE Indicates valid count values reside in PSCNT[6:0]. 0 = Invalid values in PSCNT[6:0]. (Default) 1 = Valid values in PSCNT[6:0]. PSCNT[6:0] Registers the number of OWR samples from the start time to the time when the next zero crossing is detected. [15:6] Reserved. DIR Set the zero-crossing edge direction which will stop PSCNT count. 0 = Stop count at negative to positive zero-crossing - Rising Edge. (Default) 1 = Stop count at positive to negative zero-crossing - Falling Edge. CODE[4:0] Write 10110 to this location to enable the phase sequence detection. 6.6.11 Checksum of Critical Registers (RegChk) – Page 16, Address 1 Default = 0x00 0000 This register contains the checksum of critical registers. 23 22 21 20 19 18 17 16 DONE PSCNT[6] PSCNT[5] PSCNT[4] PSCNT[3] PSCNT[2] PSCNT[1] PSCNT[0] 15 14 13 12 11 10 9 8 -- -- -- - - 7 654 32 1 0 - - DIR CODE[4] CODE[3] CODE[2] CODE[1] CODE[0] MSB LSB 223 222 221 220 219 218 217 216 ..... 26 25 24 23 22 21 20 |
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