CS5490 datasheet(52/56 Pages) APEX

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CS5490

DS982F2

result in the AC offset register. This AC offset will be

subtracted from RMS measurements in subsequent

conversions, removing the AC offset on the current

channel.

The AC offset register for the channel being calibrated

should first be cleared prior to performing the

calibration. The high-pass filter should be enabled if AC

offset calibration is used. It is recommended that

TSETTLE be set to 2000ms before performing an AC

offset calibration. Note that the AC offset register holds

the square of the RMS value measured during

calibration. Therefore, it can hold a maximum RMS

noise of

. This is the maximum RMS noise

that AC offset correction can remove.

7.1.2 Gain Calibration

Prior to executing the gain calibration command, gain

registers for any path to be calibrated (VGAIN, IGAIN)

should be set to ‘1.0,’ and TSETTLE should be set to

2000 ms. For gain calibration, a reference signal must

be applied to the meter. During gain calibration, the

voltage RMS result register (VRMS) is divided into ‘0.6,’

and the current RMS result register (IRMS) is divided into

the Scale register. The quotient is put into the

associated gain register. The gain calibration algorithm

attempts to adjust the gain register (VGAIN, IGAIN) such

that the voltage RMS result register (VRMS) equals ‘0.6,’

and the current RMS result register (IRMS) equals the

Scale register.

Note that for the gain calibration, there are limitations on

choosing the reference level and the Scale register

value. Using a reference or a scale that is too large or

too small can cause register overflow during calibration

or later during normal operation. Either condition can set

Status register bits IOR and VOR. The maximum value

that the gain register can attain is ‘4.’ Using

inappropriate reference levels or scale values may also

cause the CS5490 to attempt to set the gain register

higher than ‘4.’ Therefore, the gain calibration result will

be invalid.

The Scale register is ‘0.6’ by default. The maximum

voltage (UMAX Volts) and current (IMAX Amps) of the

meter should be used as the reference signal level if the

Scale register is ‘0.6.’ After gain calibration, ‘0.6’ of the

VRMS (IRMS) registers represents UMAX Volts (IMAX

Amps) for the line voltage (load current); ‘0.36’ of the

PAVG, QAVG, or S register represents UMAX ×IMAX

Watts, Vars, or VAs for the active, reactive, or apparent

power.

If the calibration is performed with UMAX Volts and ICAL

Amps and ICAL <IMAX, the Scale register needs to be

scaled down to 0.6 × ICAL /IMAX before performing gain

calibration. After gain calibration, ‘0.6’ of the VRMS

IRMS register represents ICAL Amps, and 0.36 x

ICAL /IMAX of the PAVG, QAVG, or S register represents

UMAX xICAL Watts, Vars, or VAs.

7.1.3 Calibration Order

1) If the HPF option is enabled, then any DC compo-

nent that may be present in the selected signal chan-

nel will be removed, and a DC offset calibration is not

required. However, if the HPF option is disabled, the

DC offset calibration should be performed.

When using high-pass filters, it is recommended that

the DC offset register for the corresponding channel

be set to 0. Before performing DC offset calibration,

the DC offset register should be set to 0, and the cor-

responding gain register should be set to 1.

2) If there is an AC offset in the IRMS calculation, the AC

offset calibration should be performed on the current

channel. Before performing AC offset calibration, the

AC offset register should be set to 0.

3) Perform the gain calibration.

4) If an AC offset calibration was performed (step 2),

then the AC offset may need to be adjusted to com-

pensate for the change in gain (step 3). This can be

accomplished by restoring zero to the AC offset reg-

ister and then performing an AC offset calibration.

The adjustment could also be done by multiplying the

AC offset register value that was calculated in step 2

by the gain calculated in step 3 and updating the AC

offset register with the product.

7.2 Phase Compensation

A phase compensation mechanism is provided to adjust

for meter-to-meter variation in signal path delays.

Phase offset between a voltage channel and its

corresponding current channel can be calculated by

using the power factor (PF) register after a conversion.

1) Apply a reference voltage and current with a lagging

power factor to the meter. The reference current

waveform should lag the voltage with a 60° phase

shift.

2) Start continuous conversion.

3) Accumulate multiple readings of the PF register.

4) Calculate the average power factor, PFavg.

5) Calculate phase offset = arccos(PFavg) - 60°.

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