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PCF8523T/1 数据表(PDF) 53 Page - NXP Semiconductors

部件名 PCF8523T/1
功能描述  Real-Time Clock (RTC) and calendar
PDF  75 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCF8523T/1 数据表(HTML) 53 Page - NXP Semiconductors

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PCF8523
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 5 July 2012
53 of 74
NXP Semiconductors
PCF8523
Real-Time Clock (RTC) and calendar
13. Application information
Fig 35. I2C-bus timing diagram; rise and fall times refer to 30 % and 70 %
SCL
SDA
tHD;STA
tSU;DAT
tHD;DAT
tf
tBUF
tSU;STA
tLOW
tHIGH
tVD;ACK
013aaa417
tSU;STO
protocol
START
condition
(S)
bit 7
MSB
(A7)
bit 6
(A6)
bit 0
(R/W)
acknowledge
(A)
STOP
condition
(P)
1/fSCL
tr
tVD;DAT
R1 and C1 are recommended to limit the Slew Rate (SR, see Table 48) of VDD. If VDD drops too
fast, the internal supply switch to the battery is not guaranteed.
Fig 36. Application diagram
013aaa341
PCF8523
OSCI
OSCO
INT1/
CLKOUT
SCL
SDA
VDD
VSS
MASTER
TRANSMITTER
RECEIVER
SCL
SDA
VDD
VSS
VBAT
CLKOUT
INT2
VDD
RR
R: pull-up resistor
R =
Cb
R1
C1
tr



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