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PCF8523T/1 数据表(PDF) 57 Page - NXP Semiconductors |
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PCF8523T/1 数据表(HTML) 57 Page - NXP Semiconductors |
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57 / 75 page ![]() PCF8523 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 4 — 5 July 2012 57 of 74 NXP Semiconductors PCF8523 Real-Time Clock (RTC) and calendar 15. Bare die outline [1] Dimension includes saw lane. [2] P1 and P3: pad size. [3] P2 and P4: bump size. Fig 40. Bare die outline of PCF8523U pcf8523u_do European projection Bare die; 12 bumps (6-6) PCF8523U detail Y P2 P1 P4 P3 detail X A A2 A1 PC8523-1 x y 0 0 2 3 4 5 6 7 8 9 10 11 12 1 D E Y X Table 50. Dimensions of PCF8523U Original dimensions are in mm. Unit (mm) A A1 A2 D[1] E[1] P1[2] P2[3] P3[2] P4[3] Bump pitch max - 0.018 - - - - 0.059 - 0.059 - nom 0.22 0.015 0.2 1.58 2.15 0.065 0.056 0.065 0.056 - min - 0.012 - - - - 0.053 - 0.053 0.149 |
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