PCF8523TSLASH1 datasheet(72/75 Pages) NXP

72 / 75 page

PCF8523

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Product data sheet

Rev. 4 — 5 July 2012

72 of 74

NXP Semiconductors

PCF8523

Real-Time Clock (RTC) and calendar

26. Figures

Fig 1.

Block diagram of PCF8523 . . . . . . . . . . . . . . . . . .3

Fig 2.

Pin configuration for SO8 (PCF8523T) . . . . . . . . .4

Fig 3.

Pin configuration for HVSON8 (PCF8523TK) . . . .4

Fig 4.

Pin configuration for TSSOP14 (PCF8523TS). . . .4

Fig 5.

Pin configuration for PCF8523U . . . . . . . . . . . . . .5

Fig 6.

Auto-incrementing of the registers . . . . . . . . . . . . .7

Fig 7.

Software reset command . . . . . . . . . . . . . . . . . . .12

Fig 8.

Interrupt block diagram . . . . . . . . . . . . . . . . . . . .14

Fig 9.

Battery switch-over behavior in standard mode

and with bit BSIE set logic 1 (enabled) . . . . . . . .17

Fig 10. Battery switch-over behavior in direct switching

mode and with bit BSIE set logic 1 (enabled) . . .18

Fig 11. Battery low detection behavior with bit BLIE

set logic 1 (enabled) . . . . . . . . . . . . . . . . . . . . . .19

Fig 12. OS flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Fig 13. Data flow diagram of the time function. . . . . . . . .23

Fig 14. Access time for read/write operations . . . . . . . . .23

Fig 15. Alarm function block diagram. . . . . . . . . . . . . . . .25

Fig 16. Alarm flag timing . . . . . . . . . . . . . . . . . . . . . . . . .26

Fig 17. AF timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Fig 18. Offset calibration calculation workflow . . . . . . . . .31

Fig 19. Watchdog activates an interrupt when timed out .36

Fig 20. General countdown timer behavior . . . . . . . . . . .37

Fig 21. General countdown timer behavior . . . . . . . . . . .38

Fig 22. Example for second interrupt when TAM = 1 . . . .40

Fig 23. Example for second interrupt when TAM = 0 . . . .40

Fig 24. Example of shortening the INT1 pulse by

clearing the SF flag . . . . . . . . . . . . . . . . . . . . . . .41

Fig 25. Example of shortening the INT1 pulse by

clearing the CTAF flag . . . . . . . . . . . . . . . . . . . . .42

Fig 26. STOP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

Fig 27. STOP bit release timing . . . . . . . . . . . . . . . . . . . .43

Fig 28. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45

Fig 29. Definition of START and STOP conditions. . . . . .45

Fig 30. System configuration . . . . . . . . . . . . . . . . . . . . . .46

Fig 31. Acknowledgement on the I2C-bus . . . . . . . . . . . .46

Fig 32. Bus protocol for write mode . . . . . . . . . . . . . . . . .47

Fig 33. Bus protocol for read mode . . . . . . . . . . . . . . . . .47

Fig 34. Device diode protection diagram of PCF8523 . .48

Fig 35. I2C-bus timing diagram; rise and fall times refer

to 30 % and 70 % . . . . . . . . . . . . . . . . . . . . . . . .53

Fig 36. Application diagram . . . . . . . . . . . . . . . . . . . . . . .53

Fig 37. Package outline SOT96-1 (SO8) of PCF8523T. .54

Fig 38. Package outline SOT909-1 (HVSON8) of

PCF8523TK . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55

Fig 39. Package outline SOT402-1 (TSSOP14) of

PCF8523TS . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56

Fig 40. Bare die outline of PCF8523U . . . . . . . . . . . . . . .57

Fig 41. Alignment mark . . . . . . . . . . . . . . . . . . . . . . . . . .58

Fig 42. Tape and reel details for PCF8523 . . . . . . . . . . .59

Fig 43. PCF8523U wafer information. . . . . . . . . . . . . . . .60

Fig 44. Film Frame Carrier (FFC) (for PCF8523U) . . . . .61

Fig 45. Temperature profiles for large and small

components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64

Fig 46. Footprint information for reflow soldering of

SOT96-1 (SO8) of PCF8523T . . . . . . . . . . . . . . .64

Fig 47. Footprint information for reflow soldering of

SOT402-1 (TSSOP14) of PCF8523TS . . . . . . . . 65

PCF8523T/1 数据表(PDF) 72 Page - NXP Semiconductors

PCF8523T/1 数据表(HTML) 72 Page - NXP Semiconductors

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