Write cmd

(sdio_mod

e_en reg)

Write data

(0xFE first

byte of

sdio_mode

_en reg)

Write

data

(0xED)

Read cmd (to

read contents of

any register

specified by the

address bits)

SDI

SDO

Read data

Write cmd

(sdio_mode

_en reg)

Bus turnaround time = half cycle

CSB

Sequence of transactions for unlocking SDIO_MODE

Note:

1. Once the SDIO_mode is unlocked. The user can read as many registers as long as nothing

else is written to sdio_mode_en register to disturb the state of SDIO_mode

2. The separate signals SDI and SDO are given in the figure for the sake of understanding.

However, only one signal SDIO exists in the design

LMP91051

www.ti.com

SNAS581A – MARCH 2012 – REVISED NOVEMBER 2012

Figure 12. Read Transaction

Figure 13. Enable SDIO Mode for reading SPI registers

Registers Organization

Configuring the device is achieved using ‘Write’ of the designated registers in the device. All the registers are

organized into individually addressable byte-long registers that have a unique address. The format of the Write/

Read instruction is as shown below.

Table 4. Write / Read Instruction Format

Bit[7]

Bit[3:0]

0 : Write Instruction

Reserved to 0

Address

1 : Read Instruction

(1)

Specifying any value other than zero in Bit[6:4] is prohibited.

REGISTERS

This section describes the programmable registers and the associated programming sequence, if any, for the

device. The following table shows the summary listing of all the registers that are available to the user and their

power-up values.

Copyright © 2012, Texas Instruments Incorporated

17

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