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ACT7006 数据表(PDF) 5 Page - Aeroflex Circuit Technology |
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ACT7006 数据表(HTML) 5 Page - Aeroflex Circuit Technology |
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5 / 29 page ![]() Aeroflex Circuit Technology SCD7005 REV B 8/2/01 Plainview NY (516) 694-6700 5 Symbol Parameter Min Typ Max Units Conditions VDD Logic Supply 4.5 5.0 5.5 VDC VIH Input "1" 2.4 V VIL Input "0" 0.6 V IL Input I -450 -600 -900 µA Note 1A IIH Input I -250 -400 -750 µA Note 1B IL Input I -50 -200 -800 µA Note 1C IIH Input I -50 -200 -800 µA Note 1D IL Input I -25 -125 -400 µA Note 2A IIH Input I -25 -125 -400 µA Note 2B VOH Output "1" 2.4 VDC Note 3A VOL Output "0" 0.4 VDC Note 3B VDD Static I 50 mA Note 4A VDD Dynamic I 170 mA Note 4B Notes: 1. VDD = 5.5V A. For RTAD0/1/2/3/4 and RTADPAR with VIL = 0.4V B. For RTAD0/1/2/3/4 and RTADPAR with VIH = 2.4V C. FOR BCSTEN WITH VIL = 0.4V, Test 1, 6MHz D. FOR BCSTEN WITH VIH = 2.4V, Test 1, 6MHz 2. All remaining inputs and I/O VDD = 5.5V A. VIL = 0.4V B. VIH = 2.4V 3. A. VDD = 4.5V and IOH = 3mA B. VDD = 5.5V and IOL = 3mA 4. VDD = 5.5V A. Clock Input = 6MHz (45-55% Duty Cycle / TTL Levels), All remaining inputs = VDD, All Outputs = Open Circuit B. During a 32 word FIFO to RAM or RAM to FIFO block move. Table 5 – Logic Electrical Characteristics (Over Full Temperature Range) |
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