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WM8952ECS/RV 数据表(PDF) 41 Page - Wolfson Microelectronics plc |
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WM8952ECS/RV 数据表(HTML) 41 Page - Wolfson Microelectronics plc |
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41 / 72 page ![]() Pre Production WM8952 w PP, Rev 3.1, June 2011 41 In I2S mode, the MSB is available on the second rising edge of BCLK following a FRAME transition. The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and the MSB of the next. Figure 21 I2S Audio Interface (assuming n-bit word length) In DSP/PCM mode, the left channel MSB is available on either the 1st (Mode B) the 2nd (Mode A) rising edge of BCLK (selectable by FRAMEP) following a rising edge of FRAME. Right channel data immediately follows left channel data. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles between the LSB of the right channel data and the next sample. FRAMEP should be set to 0 in this mode. Figure 22 DSP/PCM Mode Audio Interface (Mode A, FRAMEP=0) Figure 23 DSP/PCM Mode Audio Interface (Mode B, FRAMEP=1) |
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