63 MHz Dual Programmable Filters and

Variable Gain Amplifiers

Preliminary Technical Data

ADRF6518

Rev. PrA

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FEATURES

Matched pair of programmable filters and triple VGAs

Continuous gain control range: 72 dB

Digital gain control: 30 dB

6-pole Butterworth filter: 1 MHz to 63 MHz

in 1 MHz steps, 1 dB corner frequency

Preamplifier and postamplifier gain steps

Peak detector

Filter bypass mode, −3 dB bandwidth (BW)

VGA2 and VGA3 21 dB/12 dB gain: 350 MHz/700 MHz

IMD3: >65 dBc for 1.5 V p-p composite output

HD2, HD3: >65 dBc for 1.5 V p-p output

Differential input and output

Flexible output and input common-mode ranges

Optional dc output offset correction

SPI programmable filter corners and gain steps

Single 3.3 V supply operation with power-down feature

APPLICATIONS

Baseband I/Q receivers

Diversity receivers

ADC drivers

Point-to-point and point-to-multipoint radios

Instrumentation

Medical

FUNCTIONAL BLOCK DIAGRAM

Figure 1.

GENERAL DESCRIPTION

The ADRF6518 is a matched pair of fully differential low noise and

low distortion programmable filters and variable gain amplifiers

(VGAs). Each channel is capable of rejecting large out-of-band

interferers while reliably boosting the wanted signal, thus reducing

the bandwidth and resolution requirements on the analog-to-

digital converters (ADCs). The excellent matching between

channels and their high spurious-free dynamic range over all

gain and bandwidth settings make the ADRF6518 ideal for

quadrature-based (IQ) communication systems with dense

constellations, multiple carriers, and nearby interferers. The

various amplifier gains, filter corners and other features are all

programmable via a serial port interface (SPI) port.

The first VGA that precedes the filters offers 24 dB of continuous

gain control with fixed gain options of 9 dB, 12 dB, and 15 dB, and

sets a differential input impedance of 400 Ω. The filters provide

a six-pole Butterworth response with 1 dB corner frequencies

from 1 MHz to 63 MHz in 1 MHz steps. For operation beyond

63 MHz, the filter can be disabled and completely bypassed via

the SPI. A wideband peak detector is available to monitor the

peak signal at the filter inputs. The pair of VGAs that follow the

filters each provides 24 dB of continuous gain control with fixed

gain options of 12 dB, 15 dB, 18 dB, and 21 dB. The output buffers

offer an additional option of 3 dB or 9 dB gain and provide a

differential output impedance of less than 10 Ω. They are

capable of driving 3 V p-p into 1 kΩ loads at better than 65 dBc

HD3. The output common-mode voltage defaults to VPS/2 and

can be adjusted down to 900 mV by driving the high impedance

VOCM pin. Independent, built-in dc offset correction loops for

each channel can be disabled via the SPI if fully dc-coupled

operation is desired. The high-pass corner frequency is deter-

mined by external capacitors on the OFS1 and OFS2 pins and the

postfilter VGA gain.

The ADRF6518 operates from a 3.15 V to 3.45 V supply and

consumes a maximum supply current of 400 mA. When fully

disabled, it consumes <10 mA. The ADRF6518 is fabricated in

an advanced silicon-germanium BiCMOS process and is available

in a 32-lead, exposed pad LFCSP. Performance is specified over

the −40°C to +85°C temperature range.