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ADRF6518

Preliminary Technical Data

Rev. PrA | Page 22 of 36

PROGRAMMABLE FILTERS

The integrated programmable filter is the key signal processing

function in the ADRF6518. The filters follow a six-pole Butter-

worth prototype response that provides a compromise between

band rejection, ripple, and group delay. The 0.5 dB bandwidth is

programmed from 1 MHz to 63 MHz in 1 MHz steps via the serial

programming interface (SPI) as described in the Programming

section.

The filters are designed so that the Butterworth prototype filter

shape and group delay responses vs. frequency are retained for

any bandwidth setting. Figure 69 and Figure 70 illustrate the

ideal six-pole Butterworth gain and group delay responses,

respectively. The group delay, τg, is defined as

τg = −∂φ/∂ω

where:

φ is the phase in radians.

ω = 2πf is the frequency in radians per second.

Note that for a frequency scaled filter prototype, the absolute

magnitude of the group delay scales inversely with the band-

width; however, the shape is retained. For example, the peak

group delay for a 28 MHz bandwidth setting is 14× less than

for a 2 MHz setting.

Figure 69. Sixth-Order Butterworth Magnitude Response for 0.5 dB

Bandwidths Programmed from 2 MHz to 29 MHz in 1 MHz Steps

Figure 70. Sixth-Order Butterworth Group Delay Response for

0.5 dB Bandwidths Programmed to 2 MHz and 28 MHz

The corner frequency of the filters is defined by RC products,

which can vary by ±30% in a typical process. Therefore, all the

parts are factory calibrated for corner frequency, resulting in

a residual ±7.5% corner frequency variation over the −40°C to

+85°C temperature range. Although absolute accuracy requires

calibration, the matching of RC products between the pair of

channels is better than 1% by observing careful design and

layout practices. Calibration and excellent matching ensure

that the magnitude and group delay responses of both channels

track together, a critical requirement for digital IQ-based

communication systems.

Bypassing the Filters

For higher bandwidth applications, filters of the ADRF6518 can

be bypassed via the SPI. In the bypass mode, filters are disabled

and power consumption is significantly reduced. The bandwidth

of cascaded VGAs, which is significantly larger than 63 MHz

maximum of the filters, is fully realized in the bypass mode.

VARIABLE GAIN AMPLIFIERS (VGAs)

The cascaded VGA2 and VGA3 are also based on the X-AMP

architecture, and each has 24 dB gain range with separate high

impedance gain control inputs, VGN2 and VGN3. The VGA

structures of the second and third VGAs are identical to that of

the first VGA. However, these have slightly higher noise figure

and less drive level capability. Their output is rated at 1 V p-p

for >60 dBc HD2 and HD3. Depending on the input signal

range, the second or third VGA or both can be used for AGC

purposes. The critical level to consider while making this choice

is the signal level at the output of the VGAs, which must not

exceeded 1 V p-p to maintain low distortion.

The fixed gain following both of the variable gain sections can

also be programmed to 12 dB, 15 dB, 18 dB, or 21 dB to

maximize the dynamic range.

–20

–40

–60

–80

–100

–120

–140

–160

–180

10M

100M

FREQUENCY (Hz)

500

400

300

200

100

–100

100k

10M

100M

FREQUENCY (Hz)

BW = 2MHz

BW = 28MHz

14x

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