STM32F103C8T7 datasheet(66/105 Pages) STMICROELECTRONICS

66 / 105 page

Electrical characteristics

STM32F103x8, STM32F103xB

66/105

Doc ID 13587 Rev 15

Output driving current

The GPIOs (general-purpose inputs/outputs) can sink or source up to ±8 mA, and sink or

source up to ±20 mA (with a relaxed VOL/VOH) except PC13, PC14 and PC15 which can

sink or source up to +/-3mA. When using the GPIOs PC13 to PC15 in output mode, the

speed should not exceed 2 MHz with a maximum load of 30 pF.

In the user application, the number of I/O pins which can drive current must be limited to

respect the absolute maximum rating specified in Section 5.2:

●

The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run

consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating

IVDD (see Table 7).

●

The sum of the currents sunk by all the I/Os on VSS plus the maximum Run

consumption of the MCU sunk on VSS cannot exceed the absolute maximum rating

IVSS (see Table 7).

Output voltage levels

Unless otherwise specified, the parameters given in Table 36 are derived from tests

performed under ambient temperature and VDD supply voltage conditions summarized in

Table 9. All I/Os are CMOS and TTL compliant.

Table 36.

Output voltage characteristics

Symbol

Parameter

Conditions

Min

Max

Unit

VOL

(1)

The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 7

and the sum of IIO (I/O ports and control pins) must not exceed IVSS.

Output low level voltage for an I/O pin

when 8 pins are sunk at same time

CMOS port(2),

IIO = +8 mA

2.7 V < VDD < 3.6 V

TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.

0.4

VOH

(3)

The IIO current sourced by the device must always respect the absolute maximum rating specified in

Table 7 and the sum of IIO (I/O ports and control pins) must not exceed IVDD.

Output high level voltage for an I/O pin

when 8 pins are sourced at same time

VDD–0.4

VOL

(1)

Output low level voltage for an I/O pin

when 8 pins are sunk at same time

TTL port(2)

IIO =+ 8mA

2.7 V < VDD < 3.6 V

0.4

VOH

(3)

Output high level voltage for an I/O pin

when 8 pins are sourced at same time

2.4

VOL

(1)(4)

Based on characterization data, not tested in production.

Output low level voltage for an I/O pin

when 8 pins are sunk at same time

IIO = +20 mA

2.7 V < VDD < 3.6 V

1.3

VOH

(3)(4)

Output high level voltage for an I/O pin

when 8 pins are sourced at same time

VDD–1.3

VOL

(1)(4)

Output low level voltage for an I/O pin

when 8 pins are sunk at same time

IIO = +6 mA

2 V < VDD < 2.7 V

0.4

VOH

(3)(4)

Output high level voltage for an I/O pin

when 8 pins are sourced at same time

VDD–0.4

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