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OMAP3530ECBC72 数据表(PDF) 57 Page - Texas Instruments

部件名 OMAP3530ECBC72
功能描述  OMAP3530/25 Applications Processor: OMAP 3 Architecture
PDF  264 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

OMAP3530ECBC72 数据表(HTML) 57 Page - Texas Instruments

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OMAP3530/25 Applications Processor
www.ti.com
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
Table 2-2. Ball Characteristics (CBC Pkg.) (continued)
BALL
BALL
BUFFER
PULLUP
BALL
BALL TOP
PIN NAME
RESET REL.
MODE [4]
TYPE [5]
RESET
RESET REL.
POWER [9]
HYS [10]
STRENG TH
/DOWN
IO CELL [13]
BOTTOM [1]
[2]
[3]
MODE [8]
STATE [6]
STATE [7]
(mA) [11]
TYPE [12]
gpio_173
4
IO
safe_mode
7
-
W7
NA
mcspi2_clk
0
IO
L
L
7
vdds
Yes
4
(3)
PU100/
LVCMOS
PD100
hsusb2_tll_d
2
IO
ata7
hsusb2_data
3
O
7
gpio_178
4
IO
safe_mode
7
-
V8
NA
mcspi2_cs0
0
IO
H
H
7
vdds
Yes
4
(3)
PU100/
LVCMOS
PD100
gpt11_pwm_
1
IO
evt
hsusb2_tll_d
2
IO
ata6
hsusb2_data
3
O
6
gpio_181
4
IO
safe_mode
7
-
W8
NA
mcspi2_simo
0
IO
L
L
7
vdds
Yes
4
(3)
PU100/
LVCMOS
PD100
gpt9_pwm_e
1
IO
vt
hsusb2_tll_d
2
IO
ata4
hsusb2_data
3
I
4
gpio_179
4
IO
safe_mode
7
-
U8
NA
mcspi2_somi
0
IO
L
L
7
vdds
Yes
4
(3)
PU100/
LVCMOS
PD100
gpt10_pwm_
1
IO
evt
hsusb2_tll_d
2
IO
ata5
hsusb2_data
3
O
5
gpio_180
4
IO
safe_mode
7
-
W10
NA
mmc2_clk
0
O
L
L
7
vdds
Yes
4
(3)
PU100/
LVCMOS
PD100
mcspi3_clk
1
IO
gpio_130
4
IO
safe_mode
7
-
R10
NA
mmc2_cmd
0
IO
H
H
7
vdds
Yes
4
(3)
PU100/
LVCMOS
PD100
mcspi3_simo
1
IO
gpio_131
4
IO
safe_mode
7
-
T10
NA
mmc2_dat0
0
IO
H
H
7
vdds
Yes
4
(3)
PU100/
LVCMOS
PD100
mcspi3_somi
1
IO
gpio_132
4
IO
safe_mode
7
-
T9
NA
mmc2_dat1
0
IO
H
H
7
vdds
Yes
4
(3)
PU100/
LVCMOS
PD100
gpio_133
4
IO
safe_mode
7
-
U10
NA
mmc2_dat2
0
IO
H
H
7
vdds
Yes
4
(3)
PU100/
LVCMOS
PD100
mcspi3_cs1
1
O
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