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STM32F030C8 数据表(PDF) 68 Page - STMicroelectronics |
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STM32F030C8 数据表(HTML) 68 Page - STMicroelectronics |
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68 / 88 page ![]() Electrical characteristics STM32F030x4 STM32F030x6 STM32F030x8 68/88 DocID024849 Rev 1 Table 53. IWDG min/max timeout period at 40 kHz (LSI) (1) 1. These timings are given for a 40 kHz clock but the microcontroller’s internal RC frequency can vary from 30 to 60 kHz. Moreover, given an exact RC oscillator frequency, the exact timings still depend on the phasing of the APB interface clock versus the LSI clock so that there is always a full RC period of uncertainty. Prescaler divider PR[2:0] bits Min timeout RL[11:0]= 0x000 Max timeout RL[11:0]= 0xFFF Unit /4 0 0.1 409.6 ms /8 1 0.2 819.2 /16 2 0.4 1638.4 /32 3 0.8 3276.8 /64 4 1.6 6553.6 /128 5 3.2 13107.2 /256 6 or 7 6.4 26214.4 Table 54. WWDG min-max timeout value @48 MHz (PCLK) Prescaler WDGTB Min timeout value Max timeout value Unit 1 0 0.0853 5.4613 ms 2 1 0.1706 10.9226 4 2 0.3413 21.8453 8 3 0.6826 43.6906 |
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